MCF5271 Reference Manual, Rev. 2
Freescale Semiconductor
25-1
Chapter 25
I2C Interface
25.1 Introduction
This chapter describes the MCF5271 I2C module, including I2C protocol, clock synchronization,
and I2C programming model registers. It also provides extensive programming examples.
25.2 Overview
I2C is a two-wire, bidirectional serial bus that provides a simple, efficient method of data
exchange, minimizing the interconnection between devices. This bus is suitable for applications
that require occasional communication between many devices over a short distance. The flexible
I2C bus allows additional devices to be connected to the bus for expansion and system
development.
The interface is designed to operate up to 100 Kbps with maximum bus loading and timing. The
device is capable of operating at higher baud rates, up to a maximum of the internal bus clock
divided by 20, with reduced bus loading. The maximum communication length and the number of
devices that can be connected are limited by a maximum bus capacitance of 400 pF.
The I2C system is a true multiple-master bus; it uses arbitration and collision detection to prevent
data corruption in the event that multiple devices attempt to control the bus simultaneously. This
feature supports complex applications with multiprocessor control and can be used for rapid
testing and alignment of end products through external connections to an assembly-line computer.
NOTE
The I2C module is designed to be compatible with the Philips I2C bus
protocol. For information on system configuration, protocol, and
restrictions, see The I2C Bus Specification, Version 2.1.
NOTE
The GPIO module must be configured to enable the peripheral
25.3 Features
The I2C module has the following key features:
Compatibility with I2C bus standard version 2.1
Support for 3.3-V tolerant devices