參數(shù)資料
型號： MCF5235CVM150
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 150 MHz, RISC PROCESSOR, PBGA256
封裝： ROHS COMPLIANT, MAPBGA-256
文件頁數(shù)： 21/48頁
文件大?。?/td> 666K
代理商： MCF5235CVM150
MCF523x Integrated Microprocessor Hardware Specification, Rev. 4
Electrical Characteristics
Freescale Semiconductor
28
7.5
External Interface Timing Characteristics
Table 11 lists processor bus input timings.
NOTE
All processor bus timings are synchronous; that is, input setup/hold and
output delay with respect to the rising edge of a reference clock. The
reference clock is the CLKOUT output.
All other timing relationships can be derived from these values.
7
This specification applies to the period required for the PLL to relock after changing the MFD frequency
control bits in the synthesizer control register (SYNCR).
8
Assuming a reference is available at power up, lock time is measured from the time VDD and VDDSYN are
valid to RSTOUT negating. If the crystal oscillator is being used as the reference for the PLL, then the
crystal start up time must be added to the PLL lock time to determine the total start-up time.
9
tlpll = (64 * 4 * 5 + 5 × τ) × Tref, where Tref = 1/Fref_crystal = 1/Fref_ext = 1/Fref_1:1, and
τ = 1.57x10-6
× 2(MFD + 2).
10 PLL is operating in 1:1 PLL mode.
11 Jitter is the average deviation from the programmed frequency measured over the specified interval at
maximum fsys/2. Measurements are made with the device powered by filtered supplies and clocked by a
stable external clock signal. Noise injected into the PLL circuitry via VDDSYN and VSSSYN and variation in
crystal oscillator frequency increase the Cjitter percentage for a given interval.
12 Values are with frequency modulation disabled. If frequency modulation is enabled, jitter is the sum of
Cjitter+Cmod.
13 Modulation percentage applies over an interval of 10
μs, or equivalently the modulation rate is 100KHz.
14 Modulation rate selected must not result in f
sys/2 value greater than the fsys/2 maximum specified value.
Modulation range determined by hardware design.
15 f
sys/2 = fico / (2 * 2
RFD)
Table 11. Processor Bus Input Timing Specifications
Name
Characteristic1
1
Timing specifications are tested using full drive strength pad configurations in a 50ohm transmission line
environment..
Symbol
Min
Max
Unit
freq
System bus frequency
fsys/2
50
75
MHz
B0
CLKOUT period
tcyc
—1/75
ns
Control Inputs
B1a
Control input valid to CLKOUT high2
2
TEA and TA pins are being referred to as control inputs.
tCVCH
9—
ns
B1b
BKPT valid to CLKOUT high3
3
Refer to figure A-19.
tBKVCH
9—
ns
B2a
CLKOUT high to control inputs invalid2
tCHCII
0—
ns
B2b
CLKOUT high to asynchronous control input BKPT invalid3
tBKNCH
0—
ns
Data Inputs
B4
Data input (D[31:0]) valid to CLKOUT high
tDIVCH
4—
ns
B5
CLKOUT high to data input (D[31:0]) invalid
tCHDII
0—
ns
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCF5235CVM150 制造商:Freescale Semiconductor 功能描述:Microprocessor IC
MCF5235CVM150J 功能描述:32位微控制器 - MCU V2CORE 64KSRAM RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT
MCF5235CVM150J 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MPU 150 MHz 256-BGA
MCF5235EC 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Microprocessor Hardware Specification
MCF523X 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Microprocessor Hardware Specification
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