參數(shù)資料
型號(hào)： MCF52235CAL60
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 24/55頁(yè)
文件大?。?/td> 0K
描述： IC MCU 256K FLASH 60MHZ 112-LQFP
標(biāo)準(zhǔn)包裝： 60
系列： MCF5223x
核心處理器： Coldfire V2
芯體尺寸： 32-位
速度： 60MHz
連通性： CAN，以太網(wǎng)，I²C，SPI，UART/USART
外圍設(shè)備： DMA，LVD，POR，PWM，WDT
輸入/輸出數(shù)： 73
程序存儲(chǔ)器容量： 256KB（256K x 8）
程序存儲(chǔ)器類(lèi)型： 閃存
RAM 容量： 32K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 112-LQFP
包裝： 托盤(pán)
配用： M52235EVB-ND - BOARD EVAL FOR MCF52235
MCF52235 ColdFire Microcontroller Data Sheet, Rev. 10
Electrical Characteristics
Freescale Semiconductor
30
Table 20. Thermal Characteristics
Characteristic
Symbol
Package1
1 The use of this device in one- or two-layer board designs is not recommended due to the limited thermal conductance
provided by those boards.
Value
Unit
Junction to ambient, natural convection
JA
80-pin LQFP, four-layer board
36.02,3
2
JMA and jt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
JMA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction temperatures
can be significantly influenced by board layout and surrounding devices. Conformance to the device junction temperature
specification can be verified by physical measurement in the customer’s system using the
jt parameter, the device power
dissipation, and the method described in EIA/JESD Standard 51-2.
3 Per JEDEC JESD51-6 with the board horizontal.
C/W
112-pin LQFP, four-layer board
35.0
121 MAPBGA, four-layer board
32
80-pin LQFP, one-layer board1
49.01
121 MAPBGA, one-layer board1
561
112-pin LQFP, one-layer board1
44.01
Junction to ambient (@200 ft/min)
JMA
80-pin LQFP, four-layer board
30.0
C/W
112-pin LQFP, four-layer board
29.0
121 MAPBGA, four-layer board
28
80-pin LQFP, one-layer board1
39.01
112-pin LQFP, one-layer board1
35.01
121 MAPBGA, one-layer board1
461
Junction to board
JB
80-pin LQFP
22.04
4 Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
C/W
112-pin LQFP
23.0
121 MAPBGA, four-layer board
18
Junction to case
JC
80-pin LQFP
6.05
5 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
C/W
112-pin LQFP
6.0
121 MAPBGA
10
Junction to top of package, natural convection
jt
80-pin LQFP
2.06
6 Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written
in conformance with Psi-JT.
C/W
112-pin LQFP
2.06
121 MAPBGA
2.06
Maximum operating junction temperature
Tj
All
130
oC
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