參數(shù)資料
型號: MCF52223CVM66J
廠商: Freescale Semiconductor
文件頁數(shù): 31/55頁
文件大?。?/td> 0K
描述: IC MCU 32BIT W/USB 81MAPBGA
標準包裝: 240
系列: MCF5222x
核心處理器: Coldfire V2
芯體尺寸: 32-位
速度: 66MHz
連通性: I²C,SPI,UART/USART,USB OTG
外圍設備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 56
程序存儲器容量: 256KB(256K x 8)
程序存儲器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 8x12b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 81-LBGA
包裝: 托盤
MCF52223 ColdFire Microcontroller, Rev. 3
Electrical Characteristics
Freescale Semiconductor
37
Figure 8 shows timing for the values in Table 33 and Table 34.
Figure 8. I2C Input/Output Timings
2.12
Analog-to-Digital Converter (ADC) Parameters
Table 35 lists specifications for the analog-to-digital converter.
1 Output numbers depend on the value programmed into the IFDR; an IFDR programmed with the
maximum frequency (IFDR = 0x20) results in minimum output timings as shown in Table 34. The I2C
interface is designed to scale the actual data transition time to move it to the middle of the SCL low
period. The actual position is affected by the prescale and division values programmed into the IFDR;
however, the numbers given in Table 34 are minimum values.
2 Because SCL and SDA are open-collector-type outputs, which the processor can only actively drive
low, the time SCL or SDA take to reach a high level depends on external signal capacitance and pull-up
resistor values.
3 Specified at a nominal 50-pF load.
Table 35. ADC Parameters1
Name
Characteristic
Min
Typical
Max
Unit
VREFL
Low reference voltage
VSS
—VREFH
V
VREFH
High reference voltage
VREFL
—VDDA
V
VDDA
ADC analog supply voltage
3.0
3.3
3.6
V
VADIN
Input voltages
VREFL
—VREFH
V
RES
Resolution
12
12
Bits
INL
Integral non-linearity (full input signal range)2
2.5
3LSB3
INL
Integral non-linearity (10% to 90% input signal range)4
2.5
3LSB
DNL
Differential non-linearity
–1 < DNL <
1<1LSB
Monotonicity
GUARANTEED
fADIC
ADC internal clock
0.1
5.0
MHz
RAD
Conversion range
VREFL
—VREFH
V
tADPU
ADC power-up time5
—613
tAIC cycles
6
tREC
Recovery from auto standby
0
1
tAIC cycles
tADC
Conversion time
6
tAIC cycles
tADS
Sample time
1
tAIC cycles
CADI
Input capacitance
—pF
I2
I6
I1
I4
I7
I8
I9
I5
I3
SCL
SDA
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