
MCF52223 Family Configurations
MCF52223 ColdFire Microcontroller, Rev. 2
Freescale Semiconductor
9
links the device’s pins into one shift register. Test logic, implemented using static logic design, is independent of the device 
system logic.
The MCF52223 implementation can:
Perform boundary-scan operations to test circuit board electrical continuity
Sample MCF52223 system pins during operation and transparently shift out the result in the boundary scan register
Bypass the MCF52223 for a given circuit board test by effectively reducing the boundary-scan register to a single bit
Disable the output drive to pins during circuit-board testing
Drive output pins to stable levels
1.2.5
On-Chip Memories
1.2.5.1
SRAM
The dual-ported SRAM module provides a general-purpose 32-Kbyte memory block that the ColdFire core can access in a 
single cycle. The location of the memory block can be set to any 32-Kbyte boundary within the 4-Gbyte address space. This 
memory is ideal for storing critical code or data structures and for use as the system stack. Because the SRAM module is 
physically connected to the processor's high-speed local bus, it can quickly service core-initiated accesses or 
memory-referencing commands from the debug module.
The SRAM module is also accessible by the DMA. The dual-ported nature of the SRAM makes it ideal for implementing 
applications with double-buffer schemes, where the processor and a DMA device operate in alternate regions of the SRAM to 
maximize system performance. 
1.2.5.2
Flash Memory
The ColdFire flash module (CFM) is a non-volatile memory (NVM) module that connects to the processor’s high-speed local 
bus. The CFM is constructed with four banks of 32-Kbyte
×
16-bit flash memory arrays to generate 256 Kbytes of 32-bit flash 
memory. These electrically erasable and programmable arrays serve as non-volatile program and data memory. The flash 
memory is ideal for program and data storage for single-chip applications, allowing for field reprogramming without requiring 
an external high voltage source. The CFM interfaces to the ColdFire core through an optimized read-only memory controller 
that supports interleaved accesses from the 2-cycle flash memory arrays. A backdoor mapping of the flash memory is used for 
all program, erase, and verify operations, as well as providing a read datapath for the DMA. Flash memory may also be 
programmed via the EzPort, which is a serial flash memory programming interface that allows the flash memory to be read, 
erased and programmed by an external controller in a format compatible with most SPI bus flash memory chips. 
1.2.6
Power Management
The MCF52223 incorporates several low-power modes of operation entered under program control and exited by several 
external trigger events. An integrated power-on reset (POR) circuit monitors the input supply and forces an MCU reset as the 
supply voltage rises. The low voltage detector (LVD) monitors the supply voltage and is configurable to force a reset or interrupt 
condition if it falls below the LVD trip point. The RAM standby switch provides power to RAM when the supply voltage to the 
chip falls below the standby battery voltage. 
1.2.7
USB On-The-Go Controller
The MCF52223 includes a Universal Serial Bus On-The-Go (USB OTG) dual-mode controller. USB is a popular standard for 
connecting peripherals and portable consumer electronic devices such as digital cameras and handheld computers to host PCs. 
The OTG supplement to the USB specification extends USB to peer-to-peer application, enabling devices to connect directly 
to each other without the need for a PC. The dual-mode controller on the MCF52223 can act as a USB OTG host and as a USB 
device. It also supports full-speed and low-speed modes.