參數(shù)資料
型號(hào): MCF52100CVM80J
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 4/56頁(yè)
文件大?。?/td> 0K
描述: IC MCU 64K FLASH 80MHZ 81MAPBGA
標(biāo)準(zhǔn)包裝: 240
系列: MCF521xx
核心處理器: Coldfire V2
芯體尺寸: 32-位
速度: 80MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 56
程序存儲(chǔ)器容量: 64KB(64K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 81-LBGA
包裝: 托盤(pán)
Family Configurations
MCF52110 ColdFire Microcontroller, Rev. 1
Freescale Semiconductor
12
1.2.21
Reset
The reset controller determines the source of reset, asserts the appropriate reset signals to the system, and keeps track of what
caused the last reset. There are seven sources of reset:
External reset input
Power-on reset (POR)
Watchdog timer
Phase locked-loop (PLL) loss of lock / loss of clock
Software
Low-voltage detector (LVD)
JTAG
Control of the LVD and its associated reset and interrupt are managed by the reset controller. Other registers provide status flags
indicating the last source of reset and a control bit for software assertion of the RSTO pin.
1.2.22
GPIO
Nearly all pins on the device have general purpose I/O capability and are grouped into 8-bit ports. Some ports do not use all
eight bits. Each port has registers that configure, monitor, and control the port pin.
1.2.23
Part Numbers and Packaging
This product is RoHS-compliant. Refer to the product page at freescale.com or contact your sales office for up-to-date RoHS
information.
Table 2. Orderable Part Number Summary
Part Number
Flash / SRAM
Key Features
Package
Speed
MCF52100
64 Kbytes / 16 Kbytes
2 UARTs, 2 I2C, QSPI, A/D, DMA,
16-/32-bit/PWM Timers
64 LQFP/QFN
81 MAPBGA
66, 80 MHz
MCF52110
128 Kbytes / 16 Kbytes
3 UARTs, 2 I2C, QSPI, A/D, DMA,
16-/32-bit/PWM Timers
64 LQFP/QFN
81 MAPBGA
100 LQFP
66, 80 MHz
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