
3–3
MC14LC5003 MC14LC5004
MOTOROLA
128 Segment LCD Drivers
CMOS
The MC14LC5003/5004 are 128-segment, multiplexed-by-four LCD Driv-
ers. The two devices are functionally the same except for their data input
protocols. The MC14LC5003 uses a serial interface data input protocol. The
device may be interfaced to the MC68HCXX product families using a minimal
amount of software (see example). The MC14LC5004 has a IIC interface and
has essentially the same protocol, except that the device sends an acknowl-
edge bit back to the transmitter after each eight-bit byte is received.
MC14LC5004 also has a “read mode”, whereby data sent to the device may
be retrieved via the IIC bus.
The MC14LC5003/MC14LC5004 drives the liquid-crystal displays in a mul-
tiplexed-by-four configuration. The device accepts data from a microproces-
sor or other serial data source to drive one segment per bit. The chip does
not have a decoder, allowing for the flexibility of formatting the segment data
externally.
Devices are independently addressable via a two-wire (or three-wire) com-
munication link which can be common with other peripheral devices.
The MC14LC5003/MC14LC5004 are low cost version of MC145003 and
MC145004 without cascading function.
Drives 128 Segments Per Package
May Be Used with the Following LCDs: Segmented Alphanumeric,
Bar Graph, Dot Matrix, Custom
Quiescent Supply Current: 30
A @ 2.7 V V
DD
Operating Voltage Range: 2.7 to 5.5 V
Operating Temperature Range: -40 to 85
C
Separate Access to LCD Drive Section’s Supply Voltage to Allow for Tem-
perature Compensation
See Application Notes AN1066 and AN442
FP32
FP31
FP30
FP29
FP28
FP27
FP26
FP25
FP24
FP23
FP22
FP21
FP20
MC14LC5003
MC14LC5004
QFP
FU SUFFIX
CASE 848B
ORDERING INFORMATION
MC14LC5003FU QFP
MC14LC5004FU QFP
MCC14LC5003
MCC14LC5004
BARE DIE
BARE DIE
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20 21 22 23 24 25 26
PIN ASSIGNMENT
52 51 50 49 48 47 46 45 44 43 42 41 40
N
F
F
F
F
F
F
F
F
F
N
VS
VL
N
O
O
B
B
A
A
A
E
N
39
38
37
36
35
34
33
32
31
30
29
28
27
Din
DCLK
NC
FP1
FP2
FP3
FP4
FP5
FP6
FP7
FP8
FP9
FP10
VD
B
B
NC=NO CONNECTION
1
52
BLOCK DIAGRAM
128-BIT LATCH
LCD VOLTAGE
WAVEFORM
AND TIMING
GENERATOR
FRAME
SYNC
GENERATOR
OSCILLATOR
128-BIT SHIFT REGISTER
OSC2
OSC1
POR
DRIVERS
DRIVERS
128 - 32
MULTIPLEX
D
C
A2
A0
A1
ENB
DCLK
D
in
V
LCD
BP1-BP4
FP1-FP32
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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