參數(shù)資料
型號(hào): MC9SDJ128BVPVR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP112
封裝: 20 X 20 MM, 1.40 MM HEIGHT, 0.65 MM PITCH, LQFP-112
文件頁數(shù): 6/128頁
文件大小: 2002K
代理商: MC9SDJ128BVPVR2
MC9S12DT128B Device User Guide — V01.09
101
A.3.2 NVM Reliability
The reliability of the NVM blocks is guaranteed by stress test during qualification, constant process
monitors and burn-in to screen early life failures.
The failure rates for data retention and program/erase cycling are specified at the operating conditions
noted.
The program/erase cycle count on the sector is incremented every time a sector or mass erase event is
executed.
NOTE:
All values shown in Table A-12 are target values and subject to further extensive
characterization
Table A-12 NVM Reliability Characteristics
NOTE:
Flash cycling performance is 10 cycles at -40C to +125C. Data retention is
specified for 15 years.
NOTE:
EEPROM cycling performance is 10K cycles at -40C to 125C. Data retention is
specified for 5 years on words after cycling 10K times. However if only 10 cycles
are executed on a word the data retention is specified for 15 years.
4. Burst Programming operations are not applicable to EEPROM
5. Minimum Erase times are achieved under maximum NVM operating frequency fNVMOP.
6. Minimum time, if first word in the array is not blank
7. Maximum time to complete check on an erased block
Conditions are shown in Table A-4 unless otherwise noted
Num C
Rating
Cycles
Data Retention
Lifetime
Unit
1
C Flash/EEPROM (-40C to +125C)
10
15
Years
2
C EEPROM (-40C to +125C)
10,000
5
Years
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