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參數資料
| 型號： | MC9S12XB256VFV |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | LQFP-144 |
| 文件頁數： | 826/1348頁 |
| 文件大?。?/td> | 7416K |
| 代理商： | MC9S12XB256VFV |
Chapter 12 Serial Peripheral Interface (S12SPIV4)
MC9S12XDP512 Data Sheet, Rev. 2.21
528
Freescale Semiconductor
12.4
Functional Description
The SPI module allows a duplex, synchronous, serial communication between the MCU and peripheral
devices. Software can poll the SPI status ags or SPI operation can be interrupt driven.
The SPI system is enabled by setting the SPI enable (SPE) bit in SPI control register 1. While SPE is set,
the four associated SPI port pins are dedicated to the SPI function as:
Slave select (SS)
Serial clock (SCK)
Master out/slave in (MOSI)
Master in/slave out (MISO)
The main element of the SPI system is the SPI data register. The 8-bit data register in the master and the
8-bit data register in the slave are linked by the MOSI and MISO pins to form a distributed 16-bit register.
When a data transfer operation is performed, this 16-bit register is serially shifted eight bit positions by the
S-clock from the master, so data is exchanged between the master and the slave. Data written to the master
SPI data register becomes the output data for the slave, and data read from the master SPI data register after
a transfer operation is the input data from the slave.
A read of SPISR with SPTEF = 1 followed by a write to SPIDR puts data into the transmit data register.
When a transfer is complete and SPIF is cleared, received data is moved into the receive data register. This
8-bit data register acts as the SPI receive data register for reads and as the SPI transmit data register for
writes. A single SPI register address is used for reading data from the read data buffer and for writing data
to the transmit data register.
The clock phase control bit (CPHA) and a clock polarity control bit (CPOL) in the SPI control register 1
(SPICR1) select one of four possible clock formats to be used by the SPI system. The CPOL bit simply
selects a non-inverted or inverted clock. The CPHA bit is used to accommodate two fundamentally
different protocols by sampling data on odd numbered SCK edges or on even numbered SCK edges (see
The SPI can be congured to operate as a master or as a slave. When the MSTR bit in SPI control register1
is set, master mode is selected, when the MSTR bit is clear, slave mode is selected.
NOTE
A change of CPOL or MSTR bit while there is a received byte pending in
the receive shift register will destroy the received byte and must be avoided.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MC9S12XD128CAA | 功能描述:16位微控制器 - MCU 16 BIT - 128K FLASH RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數據總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| MC9S12XD128MAL | 功能描述:16位微控制器 - MCU 16BIT 128KFLASH 12KR RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數據總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| MC9S12XD256CAA | 功能描述:16位微控制器 - MCU 9S12XD256 TSMC3 GENERAL RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數據總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| MC9S12XD256CAG | 功能描述:16位微控制器 - MCU 512K FLASH HCS12X MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數據總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| MC9S12XD256CAL | 功能描述:16位微控制器 - MCU 9S12XD256TSMC3 GENERAL RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數據總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
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