參數(shù)資料
型號(hào)： MC9S12XA128CAGR
廠商： FREESCALE SEMICONDUCTOR INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP144
封裝： LEAD FREE, LQFP-144
文件頁(yè)數(shù)： 369/1348頁(yè)
文件大?。?/td> 7416K
代理商： MC9S12XA128CAGR
Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description
MC9S12XDP512 Data Sheet, Rev. 2.21
Freescale Semiconductor
133
Read: Anytime
Write: Anytime
76543210
R
ADPU
AFFC
AWAI
ETRIGLE
ETRIGP
ETRIGE
ASCIE
ASCIF
W
Reset
00000000
= Unimplemented or Reserved
Figure 4-5. ATD Control Register 2 (ATDCTL2)
Table 4-6. ATDCTL2 Field Descriptions
Field
Description
7
ADPU
ATD Power Down — This bit provides on/off control over the ATD10B16C block allowing reduced MCU power
consumption. Because analog electronic is turned off when powered down, the ATD requires a recovery time
period after ADPU bit is enabled.
0 Power down ATD
1 Normal ATD functionality
6
AFFC
ATD Fast Flag Clear All
0 ATD ag clearing operates normally (read the status register ATDSTAT1 before reading the result register
to clear the associate CCF ag).
1 Changes all ATD conversion complete ags to a fast clear sequence. Any access to a result register will
cause the associate CCF ag to clear automatically.
5
AWAI
ATD Power Down in Wait Mode — When entering Wait Mode this bit provides on/off control over the
ATD10B16C block allowing reduced MCU power. Because analog electronic is turned off when powered down,
the ATD requires a recovery time period after exit from Wait mode.
0 ATD continues to run in Wait mode
1 Halt conversion and power down ATD during Wait mode
After exiting Wait mode with an interrupt conversion will resume. But due to the recovery time the result of
this conversion should be ignored.
4
ETRIGLE
External Trigger Level/Edge Control — This bit controls the sensitivity of the external trigger signal. See
Table 4-7 for details.
3
ETRIGP
External Trigger Polarity — This bit controls the polarity of the external trigger signal. See Table 4-7 for
details.
2
ETRIGE
External Trigger Mode Enable — This bit enables the external trigger on one of the AD channels or one of
the ETRIG[3:0] inputs as described in Table 4-5. If external trigger source is one of the AD channels, the digital
input buffer of this channel is enabled. The external trigger allows to synchronize the start of conversion with
external events.
0 Disable external trigger
1 Enable external trigger
1
ASCIE
ATD Sequence Complete Interrupt Enable
0 ATD Sequence Complete interrupt requests are disabled.
1 ATD Interrupt will be requested whenever ASCIF = 1 is set.
0
ASCIF
ATD Sequence Complete Interrupt Flag — If ASCIE = 1 the ASCIF ag equals the SCF ag (see
Section 4.3.2.7, “ATD Status Register 0 (ATDSTAT0)”), else ASCIF reads zero. Writes have no effect.
0 No ATD interrupt occurred
1 ATD sequence complete interrupt pending
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MC9S12XA256CAAR 功能描述:16位微控制器 - MCU 9S12XA256 TSMC3 GENERAL RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
MC9S12XA256CAG 功能描述:16位微控制器 - MCU 512K FLASH HCS12X MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
MC9S12XA256CAL 功能描述:16位微控制器 - MCU 9S12XA256 TSMC3 GENERAL RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
MC9S12XA256VAA 功能描述:16位微控制器 - MCU 9S12XA256 TSMC3 GENERAL RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
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