
Port Integration Module (S12PPIMV1)
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
77
2.3.24
Port S Data Register (PTS)
2.3.25
Port S Input Register (PTIS)
Address 0x0248
Access: User read/write(1)
1. Read: Anytime The data source is depending on the data direction value.
Write: Anytime
76543210
R
0000
PTS3
PTS2
PTS1
PTS0
W
Altern.
Function
——————
TXD
RXD
Reset
00000000
Figure 2-22. Port S Data Register (PTS)
Table 2-21. PTS Register Field Descriptions
Field
Description
3-2
PTS
Port S general purpose input/output data—Data Register
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
1
PTS
Port S general purpose input/output data—Data Register, SCI TXD output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
The SCI function takes precedence over the general purpose I/O function if enabled.
0
PTS
Port S general purpose input/output data—Data Register, SCI RXD input
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
The SCI function takes precedence over the general purpose I/O function if enabled.
Address 0x0249
Access: User read(1)
76543210
R
0000
PTIS3
PTIS2
PTIS1
PTIS0
W
Reset
uuuuuuuu
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-23. Port S Input Register (PTIS)