參數(shù)資料
型號: MC9S12P128VQK
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 14 MM, 2.20 MM HEIGHT, 0.65 MM PITCH, QFP-80
文件頁數(shù): 549/564頁
文件大小: 7066K
代理商: MC9S12P128VQK
Port Integration Module (S12PPIMV1)
S12P-Family Reference Manual, Rev. 1.12
Freescale Semiconductor
85
2.3.36
Port M Pull Device Enable Register (PERM)
2.3.37
Port M Polarity Select Register (PPSM)
Address 0x0254
Access: User read/write(1)
1. Read: Anytime
Write: Anytime
76543210
R0
0
PERM5
PERM4
PERM3
PERM2
PERM1
PERM0
W
Reset
00000000
Figure 2-34. Port M Pull Device Enable Register (PERM)
Table 2-32. PERM Register Field Descriptions
Field
Description
5-0
PERM
Port M pull device enable—Enable pull device on input pin or wired-or output pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
only effect if used in wired-or mode. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
Address 0x0255
Access: User read/write(1)
1. Read: Anytime
Write: Anytime
76543210
R0
0
PPSM5
PPSM4
PPSM3
PPSM2
PPSM1
PPSM0
W
Reset
00000000
Figure 2-35. Port M Polarity Select Register (PPSM)
Table 2-33. PPSM Register Field Descriptions
Field
Description
5-0
PPSM
Port M pull device select—Congure pull device polarity on input pin
This bit selects a pull-up or a pull-down device if enabled on the associated port input pin.
If CAN is active the selection of a pull-down device on the RXCAN input will have no effect.
1 A pull-down device is selected
0 A pull-up device is selected
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