
Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
226
MC9S12C-Family / MC9S12GC-Family
Freescale Semiconductor
Rev 01.24
8.3
Memory Map and Registers
This section provides a detailed description of all registers accessible in the ATD10B8C.
8.3.1
Module Memory Map
Figure 8-2 gives an overview on all ATD10B8C registers.
Address
Name
Bit 7
6
5
4
3
2
1
Bit 0
0x0000
ATDCTL0
R
0
00000
0
W
0x0001
ATDCTL1
R
0
00000
0
W
0x0002
ATDCTL2
R
ADPU
AFFC
AWAI
ETRIGLE
ETRIGP
ETRIGE
ASCIE
ASCIF
W
0x0003
ATDCTL3
R0
S8C
S4C
S2C
S1C
FIFO
FRZ1
FRZ0
W
0x0004
ATDCTL4
R
SRES8
SMP1
SMP0
PRS4
PRS3
PRS2
PRS1
PRS0
W
0x0005
ATDCTL5
R
DJM
DSGN
SCAN
MULT
0
CC
CB
CA
W
0x0006
ATDSTAT0
R
SCF
0
ETORF
FIFOR
0
CC2
CC1
CC0
W
0x0007
Unimplemented
R
0
00000
0
W
0x0008
ATDTEST0
R
U
UUUUU
U
W
0x0009
ATDTEST1
R
U
UUUUU
U
SC
W
0x000A
Unimplemented
R
0
00000
0
W
0x000B
ATDSTAT1
R
CCF7
CCF6
CCF5
CCF4
CCF3
CCF2
CCF1
CCF0
W
0x000C
Unimplemented
R
0
00000
0
W
0x000D
ATDDIEN
R
IEN7
IEN6
IEN5
IEN4
IEN3
IEN2
IEN1
IEN0
W
0x000E
Unimplemented
R
0
00000
0
W
0x000F
PORTAD
R
PTAD7
PTAD6
PTAD5
PTAD4
PTAD3
PTAD2
PTAD1
PTAD0
W
= Unimplemented or Reserved
Figure 8-2. ATD Register Summary (Sheet 1 of 4)