參數(shù)資料
型號： MC9S12DP512VPV
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP112
封裝： LQFP-112
文件頁數(shù)： 112/124頁
文件大?。?/td> 1963K
代理商： MC9S12DP512VPV
MC9S12DP512 Device Guide V01.21
88
A.1.6 ESD Protection and Latch-up Immunity
All ESD testing is in conformity with CDF-AEC-Q100 Stress test qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the Human Body
Model (HBM), the Machine Model (MM) and the Charge Device Model.
A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
2. The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply.
The absolute maximum ratings apply when the device is powered from an external source.
3. All digital I/O pins are internally clamped to VSSX and VDDX, VSSR and VDDR or VSSA and VDDA.
4. Those pins are internally clamped to VSSPLL and VDDPLL.
5. This pin is clamped low to VSSX, but not clamped high. This pin must be tied low in applications.
Table A-2 ESD and Latch-up Test Conditions
Model
Description
Symbol
Value
Unit
Human Body
Series Resistance
R1
1500
Ohm
Storage Capacitance
C
100
pF
Number of Pulse per pin
positive
negative
-
3
Machine
Series Resistance
R1
0
Ohm
Storage Capacitance
C
200
pF
Number of Pulse per pin
positive
negative
-
3
Latch-up
Minimum input voltage limit
-2.5
V
Maximum input voltage limit
7.5
V
Table A-3 ESD and Latch-up Protection Characteristics
Num C
Rating
Symbol
Min
Max
Unit
1
C Human Body Model (HBM)
VHBM
2000
-
V
2
C Machine Model (MM)
VMM
200
-
V
3
C Charge Device Model (CDM)
VCDM
500
-
V
4C
Latch-up Current at TA = 125°C
positive
negative
ILAT
+100
-100
-mA
5C
Latch-up Current at TA = 27°C
positive
negative
ILAT
+200
-200
-mA
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