參數(shù)資料
型號(hào)： MC9S12DB128VPV
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP112
封裝： LQFP-112
文件頁數(shù)： 22/138頁
文件大?。?/td> 2093K
代理商： MC9S12DB128VPV
MC9S12DT128 Device User Guide — V02.11
118
A.5.1.5 Pseudo Stop and Wait Recovery
The recovery from Pseudo STOP and Wait are essentially the same since the oscillator was not stopped in
both modes. The controller can be woken up by internal or external interrupts. After twrs the CPU starts
fetching the interrupt vector.
A.5.2 Oscillator
The device features an internal Colpitts and Pierce oscillator. The selection of Colpitts oscillator or Pierce
oscillator/external clock depends on the XCLKS signal which is sampled during reset.By asserting the
XCLKS input during reset this oscillator can be bypassed allowing the input of a square wave. Before
asserting the oscillator to the internal system clocks the quality of the oscillation is checked for each start
from either power-on, STOP or oscillator fail. tCQOUT specifies the maximum time before switching to the
internal self clock mode after POR or STOP if a proper oscillation is not detected. The quality check also
determines the minimum oscillator start-up time tUPOSC. The device also features a clock monitor. A
Clock Monitor Failure is asserted if the frequency of the incoming clock signal is below the Assert
Frequency fCMFA.
Table A-15 Oscillator Characteristics
Conditions are shown in Table A-4 unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
1a
C Crystal oscillator range (Colpitts)
fOSC
0.5
16
MHz
1b
C Crystal oscillator range (Pierce) 1
NOTES:
1. Depending on the crystal a damping series resistor might be necessary
fOSC
0.5
40
MHz
2
P Startup Current
iOSC
100
A
3
C Oscillator start-up time (Colpitts)
tUPOSC
82
2. fosc = 4MHz, C = 22pF.
1003
3. Maximum value is for extreme cases using high Q, low frequency crystals
ms
4
D Clock Quality check time-out
tCQOUT
0.45
2.5
s
5
P Clock Monitor Failure Assert Frequency
fCMFA
50
100
200
KHz
6P External square wave input frequency 4
4. XCLKS =0 during reset
fEXT
0.5
50
MHz
7
D External square wave pulse width low
tEXTL
9.5
ns
8
D External square wave pulse width high
tEXTH
9.5
ns
9
D External square wave rise time
tEXTR
1ns
10
D External square wave fall time
tEXTF
1ns
11
D Input Capacitance (EXTAL, XTAL pins)
CIN
7pF
12
C
DC Operating Bias in Colpitts Conguration on
EXTAL Pin
VDCBIAS
1.1
V
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