參數(shù)資料
型號: MC9S12B128VPV25
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP112
封裝: LQFP-112
文件頁數(shù): 127/132頁
文件大?。?/td> 1842K
代理商: MC9S12B128VPV25
Device User Guide — 9S12B128DGV1/D V01.13
94
beyond the power supply levels that it ties to. If the input level goes outside of this range it will effectively
be clipped.
A.2.3 Factors influencing accuracy
Three factors - source resistance, source capacitance and current injection - have an influence on the
accuracy of the ATD.
A.2.3.1 Source Resistance:
Due to the input pin leakage current as specified in Table A-6 in conjunction with the source resistance
there will be a voltage drop from the signal source to the ATD input. The maximum source resistance RS
specifies results in an error of less than 1/2 LSB (2.5mV) at the maximum leakage current. If device or
operating conditions are less than worst case or leakage-induced error is acceptable, larger values of source
resistance is allowed.
A.2.3.2 Source Capacitance
When sampling an additional internal capacitor is switched to the input. This can cause a voltage drop due
to charge sharing with the external and the pin capacitance. For a maximum sampling error of the input
voltage
≤ 1LSB, then the external filter capacitor, C
f ≥ 1024 * (CINS- CINN).
Table A-11 ATD Operating Characteristics In 3.3V Range
Conditions are shown in Table A-4 unless otherwise noted. Supply Voltage 3.3V-10% <= VDDA <= 3.3V+10%
Num C
Rating
Symbol
Min
Typ
Max
Unit
1D
Reference Potential
Low
High
VRL
VRH
VSSA
VDDA/2
VDDA
V
2C Differential Reference Voltage1
NOTES:
1. Full accuracy is not guaranteed when differential voltage is less than 3.0V
VRH-VRL
3.0
3.3
3.6
V
3
D ATD Clock Frequency
fATDCLK
0.5
2.0
MHz
4D
ATD 10-Bit Conversion Period
Clock Cycles2
Conv, Time at 2.0MHz ATD Clock fATDCLK
2. The minimum time assumes a final sample period of 2 ATD clocks cycles while the maximum time assumes a final sample
period of 16 ATD clocks.
NCONV10
TCONV10
14
7
28
14
Cycles
s
5D
ATD 8-Bit Conversion Period
Clock Cycles2
Conv, Time at 2.0MHz ATD Clock fATDCLK
NCONV8
TCONV8
12
6
26
13
Cycles
s
6D Recovery Time (VDDA=3.3 Volts)
tREC
20
s
7
P Reference Supply current
IREF
0.250
mA
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