參數(shù)資料
型號: MC9S08SG4MTJR
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDSO20
封裝: ROHS COMPLIANT, TSSOP-20
文件頁數(shù): 273/316頁
文件大小: 3118K
代理商: MC9S08SG4MTJR
MC9S08SG8 MCU Series Data Sheet, Rev. 6
6
Freescale Semiconductor
Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will be
the most current. Your printed copy may be an earlier revision. To verify you have the latest information
available, refer to: http://freescale.com/
The following revision history table summarizes changes contained in this document.
Revision
Number
Revision
Date
Description of Changes
0
15 Dec 2006
Initial alpha customer release version; Preliminary
1
June 2007
Samples Draft. Updated book with the latest TPM v3 module. Includes some minor
edits to the IIC module to update the Module Quick Start. Fixed the SOPT1 bits 1
and 0 to be RESERVED for both READ and WRITE. Changed all the Reset states
of the Slew Rate Enable Registers (PTASE, PTBSE, and PTCSE) bits from 1 to 0
due to silicon functional change.
2
11/2007
Market Launch. Updated the Electricals and Device Numbering scheme.
3
12/2007
Fixed typos: Chapter 7 heading corrected version to v2, and Figure 16-1. title cor-
rected to read ...”TPM Modules Highlighted.”
Table A-3. Thermal Characteristics row 1, V and M entries were transposed. V
now refers to value -40 to 105
°C and M now refers to value -40 to 125°C. Added
row 2, parameter classication of “D” and row 4 symbol of ”
θJA.”
Table A-6. DC Characteristics, row 8 Input Hysteresis, corrected units from mV to V.
4
3/2008
SPI block corrected to be version 3 of the module.
Temperature Sensor values corrected to reect the ADC 5V in Section 9.1.4 Tem-
perature Sensor and Table A-12. ADC Characteristics.
Provided Maximum juncture temperature for C, V, and M Temperature ranges.
Corrected Table A-6, row 10 separated to two pins: PTB6/SDA/XTAL, RESET.
Corrected block diagrams User Flash and User RAM listing typos to be SG8 and
SG4 instead of SH8 and SH4.
Updated the Revision History for Revision Number 1 to include the information on
the Slew Rate Enable Register changes that occurred for that revision.
5
6/2008
Added ICS over Temperature graph to Electricals appendix.
6
7/2009
Revised NV Register 0xFFAE address to have dashes instead of 0s.
Revised NVOPT register in Table 4-4 and Figure 4-6 so that Reserved is indicated
with em dashes (—).
Changed ICS FLL deviation to 1.5% from 2%.
Table A-9, Row 1and Table A-6 footnote 10: Removed temperature reference.
Table A-9, Row 9: Changed Column C to “D” and Max to “1.5%”
Removed section A.14.2.
Updated Mechanical drawings to point to the Freescale web.
Rebuilt book to ensure proper footers and pagination.
Revised all "Reserved" vector space memory locations in Table 4-1 to read,
"Unused Vector Space (available for user program)."
Freescale Semiconductor, Inc., 2006-2008. All rights reserved.
This product incorporates SuperFlash Technology licensed from SST.
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