
SoC Guide — MC9S08RG60/D V1.08
MOTOROLA
27
MC9S08RC/RD/RE/RG
PTD6/TPM1CH0
I/O
N
SWC
PTE0
I/O
N
SWC
Available only in 44-LQFP package
PTE1
I/O
N
SWC
Available only in 44-LQFP package
PTE2
I/O
N
SWC
Available only in 44-LQFP package
PTE3
I/O
N
SWC
Available only in 44-LQFP package
PTE4
I/O
N
SWC
Available only in 44-LQFP package
PTE5
I/O
N
SWC
Available only in 44-LQFP package
PTE6
I/O
N
SWC
Available only in 44-LQFP package
PTE7
I/O
N
SWC
Available only in 44-LQFP package
NOTES:
1. Unless otherwise indicated, all digital inputs have input hysteresis.
2. SWC is software-controlled pullup resistor, the register is associated with the respective port.
3. When these pins are configured as RESET or BKGD/MS pullup device is enabled.
4. When configured for the IRQ function, this pin will have a pullup device enabled when the IRQ is set for falling edge
detection and a pulldown device enabled when the IRQ is set for rising edge detection.
Table 2-2 Signal Properties (Continued)
Pin
Name
Dir(1)
High
Current Pin
Pullup(2)
Comments