
Carrier Modulator Transmitter (CMT) Block Description
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
122
Freescale Semiconductor
8.6.4
CMT Modulator Data Registers (CMTCMD1, CMTCMD2, CMTCMD3,
and CMTCMD4)
The modulator data registers control the mark and space periods of the modulator for all modes. The
contents of these registers are transferred to the modulator down counter and space period register upon
the completion of a modulation period.
1
EOCIE
End of Cycle Interrupt Enable — A CPU interrupt will be requested when EOCF is set if EOCIE is high.
0
CPU interrupt disabled
1
CPU interrupt enabled
0
MCGEN
Modulator and Carrier Generator Enable — Setting MCGEN will initialize the carrier generator and modulator
and enable all clocks. After it is enabled, the carrier generator and modulator will function continuously. When
MCGEN is cleared, the current modulator cycle will be allowed to expire before all carrier and modulator clocks
are disabled (to save power) and the modulator output is forced low. To prevent spurious operation, the user
should initialize all data and control registers before enabling the system.
0
Modulator and carrier generator disabled
1
Modulator and carrier generator enabled
Table 8-9. Sample Register Summary
Name
76543210
CMTCMD1
R
MB15
MB14
MB13
MB12
MB11
MB10
MB9
MB8
W
CMTCMD2
R
MB7
MB6
MB5
MB4
MB3
MB2
MB1
MB0
W
CMTCMD3
R
SB15
SB14
SB13
SB12
SB11
SB10
SB9
SB8
W
CMTCMD4
R
SB7
SB6
SB5
SB4
SB3
SB2
SB1
SB0
W
Table 8-8. CMTMSC Field Descriptions (continued)
Field
Description