
Chapter 4 Memory Map and Register Definition
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Freescale Semiconductor
45
Provided the key enable (KEYEN) bit is 1, the 8-byte comparison key can be used to temporarily
disengage memory security. This key mechanism can be accessed only through user code running in secure
memory. (A security key cannot be entered directly through background debug commands.) This security
key can be disabled completely by programming the KEYEN bit to 0. If the security key is disabled, the
only way to disengage security is by mass erasing the FLASH if needed (normally through the background
debug interface) and verifying that FLASH is blank. To avoid returning to secure mode after the next reset,
program the security bits (SEC01:SEC00) to the unsecured state (1:0).
4.4
RAM
The MC9S08QG8/4 includes static RAM. The locations in RAM below 0x0100 can be accessed using the
more efficient direct addressing mode, and any single bit in this area can be accessed with the bit
manipulation instructions (BCLR, BSET, BRCLR, and BRSET). Locating the most frequently accessed
program variables in this area of RAM is preferred.
The RAM retains data when the MCU is in low-power wait, stop2, or stop3 mode. At power-on or after
wakeup from stop1, the contents of RAM are uninitialized. RAM data is unaffected by any reset provided
that the supply voltage does not drop below the minimum value for RAM retention (VRAM).
For compatibility with M68HC05 MCUs, the HCS08 resets the stack pointer to 0x00FF. In the
MC9S08QG8/4, it is usually best to reinitialize the stack pointer to the top of the RAM so the direct page
RAM can be used for frequently accessed RAM variables and bit-addressable program variables. Include
the following 2-instruction sequence in your reset initialization routine (where RamLast is equated to the
highest address of the RAM in the Freescale Semiconductor-provided equate file).
LDHX
#RamLast+1
;point one past RAM
TXS
;SP<-(H:X-1)
When security is enabled, the RAM is considered a secure memory resource and is not accessible through
description of the security feature.
The RAM array is not automatically initialized out of reset.
Table 4-4. Nonvolatile Register Summary
Address
Register Name
Bit 7
654321
Bit 0
0xFFAE
Reserved for
Storage of FTRIM
0
0FTRIM
0xFFAF
Reserved for
Storage of ICSTRM
TRIM
0xFFB0 –
0xFFB7
8-Byte Comparison Key
0xFFB8 –
0xFFBC
Unused
—
0xFFBD
NVPROT
FPS
FPDIS
0xFFBE
Unused
—
0xFFBF
NVOPT
KEYEN
FNORED
0
SEC01
SEC00