MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
Freescale Semiconductor
11
Section Number
Title
Page
Chapter 6
Parallel Input/Output Control
6.1
6.2
6.3
6.4
Port Data and Data Direction ..........................................................................................................75
Pin Control — Pullup, Slew Rate, and Drive Strength ...................................................................76
Pin Behavior in Stop Modes ............................................................................................................77
Parallel I/O Registers .......................................................................................................................77
6.4.1
Port A Registers ................................................................................................................77
6.4.2
Port A Control Registers ...................................................................................................78
6.4.3
Port B Registers ................................................................................................................81
6.4.4
Port B Control Registers ...................................................................................................82
Chapter 7
Central Processor Unit (S08CPUV2)
Introduction .....................................................................................................................................85
7.1.1
Features .............................................................................................................................85
Programmer’s Model and CPU Registers .......................................................................................86
7.2.1
Accumulator (A) ...............................................................................................................86
7.2.2
Index Register (H:X) .........................................................................................................86
7.2.3
Stack Pointer (SP) .............................................................................................................87
7.2.4
Program Counter (PC) ......................................................................................................87
7.2.5
Condition Code Register (CCR) .......................................................................................87
Addressing Modes ...........................................................................................................................88
7.3.1
Inherent Addressing Mode (INH) .....................................................................................89
7.3.2
Relative Addressing Mode (REL) .....................................................................................89
7.3.3
Immediate Addressing Mode (IMM) ................................................................................89
7.3.4
Direct Addressing Mode (DIR) ........................................................................................89
7.3.5
Extended Addressing Mode (EXT) ..................................................................................89
7.3.6
Indexed Addressing Mode ................................................................................................89
Special Operations ...........................................................................................................................90
7.4.1
Reset Sequence .................................................................................................................91
7.4.2
Interrupt Sequence ............................................................................................................91
7.4.3
Wait Mode Operation ........................................................................................................92
7.4.4
Stop Mode Operation ........................................................................................................92
7.4.5
BGND Instruction .............................................................................................................92
HCS08 Instruction Set Summary ....................................................................................................93
7.1
7.2
7.3
7.4
7.5
Chapter 8
Analog Comparator (S08ACMPV2)
Introduction ...................................................................................................................................105
8.1.1
ACMP Configuration Information ..................................................................................105
8.1.2
ACMP/TPM Configuration Information .........................................................................105
8.1.3
Features ...........................................................................................................................107
8.1