
Chapter 2 Pins and Connections
MC9S08EN32 Series Data Sheet, Rev. 2
Freescale Semiconductor
25
2.2
Recommended System Connections
Figure 2-3 shows pin connections that are common to MC9S08EN32 Series application systems.
Figure 2-3. Basic System Connections (Shown in 48-Pin Package)
2.2.1
Power
VDD and VSS are the primary power supply pins for the MCU. This voltage source supplies power to all
I/O buffer circuitry and to an internal voltage regulator. The internal voltage regulator provides regulated
lower-voltage source to the CPU and other internal circuitry of the MCU.
PORT
A
C2
C1
X1
RF
RS
PTA0/PIA0/ADP0/MCLK
PTA1/PIA1/ADP1/ACMP1+
PTA2/PIA2/ADP2/ACMP1-
PTA3/PIA3/ADP3/ACMP1O
PTA4/PIA4/ADP4
PTA5/PIA5/ADP5
PTA6/PIA6/ADP6
PTA7/PIA7/ADP7/IRQ
PORT
B
PTB0/PIB0/ADP8
PTB1/PIB1/ADP9
PORT
D
PTD2/PID2/TPM1CH0
PTD3/PID3/TPM1CH1
PTD4/PID4/TPM1CH2
PTD5/PID5/TPM1CH3
PORT
E
PORT
G
PORT
F
IRQ
MC9S08EN32
PTG0/EXTAL
PTG1/XTAL
TPM1CLK
PTF4
PTF5
PTE0/TxD1
PTE1/RxD1
PTE2/SS
PTE3/SPSCK
PTE4/MOSI
PTE5/MISO
PTE6
PTE7
PTD0/PID0
PTD1/PID1
PTB2/PIB2/ADP10
PTB3/PIB3/ADP11
PTB4/PIB4
PTB5/PIB5
PTB6/PIB6
PTB7/PIB7
PTD6/PID6
PTD7/PID7
NOTES:
1. External crystal circuit not
required if using the internal
clock option.
2. RESET pin can only be used to
reset into user mode, you can
not enter BDM using RESET
pin. BDM can be entered by
holding MS low during POR or
writing a 1 to BDFR in SBDFR
with MS low after issuing BDM
command.
3. RC filter on RESET pin
recommended for noisy
environments.
4. For 32-pin and 48-pin
packages: VDDA and VSSA are
double bonded to VREFH and
VREFL respectively.
CBY
0.1
μF
VREFH
VREFL
VSSA
VDDA
VDD
VSS
CBY
0.1
μF
CBLK
10
μF
+
5 V
+
SYSTEM
POWER
BKGD/MS
RESET
OPTIONAL
MANUAL
RESET
VDD
BACKGROUND HEADER
0.1
μF
VDD
4.7 k
Ω–10 kΩ