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參數(shù)資料
| 型號： | MC9328MXLVH20R2 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA256 |
| 封裝： | 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MAPBGA-256 |
| 文件頁數(shù)： | 12/82頁 |
| 文件大?。?/td> | 1452K |
| 代理商： | MC9328MXLVH20R2 |
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2
MC9328MXL Advance Information
MOTOROLA
Introduction
1.1 Conventions
This document uses the following conventions:
OVERBAR is used to indicate a signal that is active when pulled low: for example, RESET.
Logic level one is a voltage that corresponds to Boolean true (1) state.
Logic level zero is a voltage that corresponds to Boolean false (0) state.
To set a bit or bits means to establish logic level one.
To clear a bit or bits means to establish logic level zero.
A signal is an electronic construct whose state conveys or changes in state convey information.
A pin is an external physical connection. The same pin can be used to connect a number of signals.
Asserted means that a discrete signal is in active logic state.
— Active low signals change from logic level one to logic level zero.
— Active high signals change from logic level zero to logic level one.
Negated means that an asserted discrete signal changes logic state.
— Active low signals change from logic level zero to logic level one.
— Active high signals change from logic level one to logic level zero.
LSB means least significant bit or bits, and MSB means most significant bit or bits. References to
low and high bytes or words are spelled out.
Numbers preceded by a percent sign (%) are binary. Numbers preceded by a dollar sign ($) or 0x
are hexadecimal.
1.2 Features
To support a wide variety of applications, the MC9328MXL offers a robust array of features, including the
following:
ARM920T Microprocessor Core
AHB to IP Bus Interfaces (AIPIs)
External Interface Module (EIM)
SDRAM Controller (SDRAMC)
DPLL Clock and Power Control Module
Two Universal Asynchronous Receiver/Transmitters (UART 1 and UART 2)
Two Serial Peripheral Interfaces (SPI1 and SPI2)
Two General-Purpose 32-bit Counters/Timers
Watchdog Timer
Real-Time Clock/Sampling Timer (RTC)
LCD Controller (LCDC)
Pulse-Width Modulation (PWM) Module
Universal Serial Bus (USB) Device
Multimedia Card and Secure Digital (MMC/SD) Host Controller Module
Memory Stick Host Controller (MSHC)
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相關代理商/技術參數(shù) |
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| MC9328MXLVM15 | 功能描述:處理器 - 專門應用 DRAGONBALL CORSICA PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MC9328MXLVM15R2 | 功能描述:處理器 - 專門應用 DRAGONBALL CORSICA PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MC9328MXLVM20 | 功能描述:處理器 - 專門應用 DRAGONBALL CORSICA PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MC9328MXLVM20 | 制造商:Freescale Semiconductor 功能描述:Microprocessor |
| MC9328MXLVM20R2 | 功能描述:處理器 - 專門應用 DRAGONBALL CORSICA PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
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