參數(shù)資料
型號: MC9328MXLCVM15R2
廠商: Freescale Semiconductor
文件頁數(shù): 58/90頁
文件大小: 0K
描述: IC MCU I.MX 150MHZ 256-MAPBGA
標(biāo)準(zhǔn)包裝: 1,000
系列: i.MXL
核心處理器: ARM9
芯體尺寸: 32-位
速度: 150MHz
連通性: EBI/EMI,I²C,MMC/SD,SPI,SSI,UART/USART,USB
外圍設(shè)備: DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 97
程序存儲器類型: ROMless
電壓 - 電源 (Vcc/Vdd): 1.7 V ~ 3.3 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 256-LFBGA
包裝: 帶卷 (TR)
Functional Description and Application Information
MC9328MXL Technical Data, Rev. 8
Freescale Semiconductor
61
Figure 45. Timing Diagrams at Data Read
Figure 46 shows the basic write operation timing. As with the read operation, after the card response, the
data transfer starts after NWR cycles. The data is suffixed with CRC check bits to allow the card to check
for transmission errors. The card sends back the CRC check result as a CC status token on the data line. If
there was a transmission error, the card sends a negative CRC status (101); otherwise, a positive CRC
status (010) is returned. The card expects a continuous flow of data blocks if it is configured to multiple
block mode, with the flow terminated by a stop transmission command.
NAC cycles
Read Data
Timing of single block read
NAC cycles
Read Data
Timing of multiple block read
NAC cycles
NST
Timing of stop command
(CMD12, data transfer mode)
Host Command
Response
NCR cycles
CMD
Content
S T
E Z Z P
P S T
Content
CRC E Z
******
CRC
DAT
Z****Z
Z Z P
P S D
*****
D D D
DAT
Z****Z
Z Z P
P S D
*****
******
D D D
P
*****
P S D D D D
******
Host Command
Response
NCR cycles
CMD
Content
S T
E Z Z P
P S T
Content
CRC E Z
******
CRC
*****
Read Data
Host Command
Response
NCR cycles
CMD
Content
S T
E Z Z P
P S T
Content
CRC E Z
******
CRC
Valid Read Data
DAT
*****
Z
E
*****
D D D D
Z
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