<thead id="4slw0"><optgroup id="4slw0"></optgroup></thead>
<small id="4slw0"><noframes id="4slw0"><pre id="4slw0"></pre>
<table id="4slw0"></table>
  • 參數(shù)資料
    型號(hào): MC9328MX21DVMR2
    廠商: FREESCALE SEMICONDUCTOR INC
    元件分類: 微控制器/微處理器
    英文描述: 32-BIT, 266 MHz, MICROPROCESSOR, PBGA289
    封裝: 14 X 14 MM, 1.41 MM HEIGHT, 0.65 MM PITCH, LEAD FREE, PLASTIC, MAPBGA-289
    文件頁(yè)數(shù): 5/100頁(yè)
    文件大小: 1979K
    代理商: MC9328MX21DVMR2
    MC9328MX21 Technical Data, Rev. 3.4
    12
    Freescale Semiconductor
    Signal Descriptions
    USBH2_FS
    USB Host2 Full Speed output signal. This signal is multiplexed with CSPI2_SS[0] of CSPI2.
    USBG_SCL
    USB OTG I2C Clock input/output signal. This signal is multiplexed with SLCDC1_DAT8.
    USBG_SDA
    USB OTG I2C Data input/output signal. This signal is multiplexed with SLCDC1_DAT7.
    USBG_TXR_INT
    USB OTG transceiver interrupt input. Multiplexed with USBG_FS.
    Secure Digital Interface
    SD1_CMD
    SD Command bidirectional signal—If the system designer does not want to make use of the internal pull-
    up, via the Pull-up enable register, a 4.7k–69k external pull-up resistor must be added. This signal is
    multiplexed with CSPI3_MOSI.
    SD1_CLK
    SD Output Clock. This signal is multiplexed with CSPI3_SCLK.
    SD1_D[3:0]
    SD Data bidirectional signals—If the system designer does not want to make use of the internal pull-up,
    via the Pull-up enable register, a 50k–69k external pull-up resistor must be added. SD1_D[3] is muxed
    with CSPI3_SS while SD1_D[0] is muxed with CSPI3_MISO.
    SD2_CMD
    SD Command bidirectional signal. This signal is multiplexed with SLCDC1_CS signal from SLCDC1.
    SD2_CLK
    SD Output Clock signal. This signal is multiplexed with SLCDC1_CLK signal from SLCDC1.
    SD2_D[3:0]
    SD Data bidirectional signals. SD2_D[3:2] are multiplexed with SLCDC1_RS and SLCDC_D0 signals
    from SLCDC1.
    UARTs – IrDA/Auto-Bauding
    UART1_RXD
    Receive Data input signal
    UART1_TXD
    Transmit Data output signal
    UART1_RTS
    Request to Send input signal
    UART1_CTS
    Clear to Send output signal
    UART2_RXD
    Receive Data input signal. This signal is multiplexed with KP_ROW6 signal from KPP.
    UART2_TXD
    Transmit Data output signal. This signal is multiplexed with KP_COL6 signal from KPP.
    UART2_RTS
    Request to Send input signal. This signal is multiplexed with KP_ROW7 signal from KPP.
    UART2_CTS
    Clear to Send output signal. This signal is multiplexed with KP_COL7 signal from KPP.
    UART3_RXD
    Receive Data input signal. This signal is multiplexed with IR_RXD from FIRI.
    UART3_TXD
    Transmit Data output signal. This signal is multiplexed with IR_TXD from FIRI.
    UART3_RTS
    Request to Send input signal
    UART3_CTS
    Clear to Send output signal
    UART4_RXD
    Receive Data input signal which is multiplexed with USBH1_RXDP and USBH1_TXDP.
    UART4_TXD
    Transmit Data output signal which is multiplexed with USBH1_TXDM.
    UART4_RTS
    Request to Send input signal which is multiplexed with USBH1_FS and USBH1_RXDP.
    UART4_CTS
    Clear to Send output signal which is multiplexed with USBH1_TXDP and USBH1_RXDM.
    Serial Audio Port – SSI (configurable to I2S protocol and AC97)
    SSI1_CLK
    Serial clock signal which is output in master or input in slave
    SSI1_TXD
    Transmit serial data
    SSI1_RXD
    Receive serial data
    SSI1_FS
    Frame Sync signal which is output in master and input in slave
    Table 2. i.MX21 Signal Descriptions (Continued)
    Signal Name
    Function/Notes
    相關(guān)PDF資料
    PDF描述
    MC9328MX21DVM 32-BIT, 266 MHz, MICROPROCESSOR, PBGA289
    MC9328MX21DVKR2 32-BIT, 266 MHz, MICROPROCESSOR, PBGA289
    MC9328MX21VK 32-BIT, 266 MHz, MICROPROCESSOR, PBGA289
    MC9328MX21DVK 32-BIT, 266 MHz, MICROPROCESSOR, PBGA289
    MC9328MX21VH 266 MHz, MICROPROCESSOR, PBGA289
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    MC9328MX21S 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:i.MX family of microprocessors 266 MHz
    MC9328MX21S_08 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:i.MX family of microprocessors 266 MHz
    MC9328MX21SCVK 功能描述:處理器 - 專門(mén)應(yīng)用 DB I.MX21S RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
    MC9328MX21SCVKR2 功能描述:處理器 - 專門(mén)應(yīng)用 DB I.MX21S RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
    MC9328MX21SCVM 功能描述:處理器 - 專門(mén)應(yīng)用 DB I.MX21 17X17 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432