參數(shù)資料
型號(hào)： MC9328MX21DVH
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 266 MHz, MICROPROCESSOR, PBGA289
封裝： 17 X 17 MM, 1.45 MM HEIGHT, 0.80 MM PITCH, MAPBGA-289
文件頁(yè)數(shù)： 13/106頁(yè)
文件大小： 1932K
代理商： MC9328MX21DVH
MC9328MX21 Product Preview, Rev. 1.1
14
Freescale Semiconductor
Signal Descriptions
SSI2_FS
Frame Sync signal which is output in master and input in slave.
SSI2_MCLK
SSI2 master clock. Multiplexed with TOUT.
SSI3_CLK
Serial clock signal which is output in master or input in slave. This signal is multiplexed with
SLCDC2_CLK
SSI3_TXD
Transmit serial data signal which is multiplexed with SLCDC2_CS
SSI3_RXD
Receive serial data which is multiplexed with SLCDC2_RS
SSI3_FS
Frame Sync signal which is output in master and input in slave. This signal is multiplexed with
SLCDC2_D0.
SAP_CLK
Serial clock signal which is output in master or input in slave.
SAP_TXD
Transmit serial data
SAP_RXD
Receive serial data
SAP_FS
Frame Sync signal which is output in master and input in slave.
I2C
I2C_CLK
I2C Clock
I2C_DATA
I2C Data
1-Wire
OWIRE
One wire input and output signal. This signal is multiplexed with JTAG RTCK.
PWM
PWMO
PWM Output. This signal is multiplexed with PC_SPKOUT of PCMCIA, as well as TOUT2 and
TOUT3 of the General Purpose Timer module.
Keypad
KP_COL[7:0]
Keypad Column selection signals. KP_COL[7:6] are multiplexed with UART2_CTS and
UART2_TXD respectively. Alternatively, KP_COL6 is also available on the internal factory test
signal TEST_WB2. The Function Multiplexing Control Register in the System Control chapter must
be used in conjunction with programming the GPIO multiplexing (to select the alternate signal
multiplexing) to choose which signal KP_COL6 is available.
KP_ROW[7:0]
Keypad Row selection signals. KP_ROW[7:6] are multiplexed with UART2_RTS and UART2_RXD
signals respectively. Alternatively, KP_ROW7 and KP_ROW6 are available on the internal factory
test signals TEST_WB0 and TEST_WB1 respectively. The Function Multiplexing Control Register
in the System Control chapter must be used in conjunction with programming the GPIO
multiplexing (to select the alternate signal multiplexing) to choose which signals KP_ROW6 and
KP_ROW7 are available.
Noisy Supply Pins
NVDD
Noisy Supply for the I/O pins. There are six (6) I/O voltage rings, NVDD1 through NVDD6.
NVSS
Noisy Ground for the I/O pins
Table 2. i.MX21 Signal Descriptions (Continued)
Signal Name
Function/Notes
相關(guān)PDF資料
PDF描述
MC9328MX21DVG 266 MHz, MICROPROCESSOR, PBGA289
MC9328MXLCVM15R2 32-BIT, 150 MHz, RISC PROCESSOR, PBGA256
MC9328MXLDVM15 32-BIT, 150 MHz, RISC PROCESSOR, PBGA256
MC9328MXLCVM15 32-BIT, 150 MHz, RISC PROCESSOR, PBGA256
MC9328MXLDVP15R2 32-BIT, 150 MHz, RISC PROCESSOR, PBGA225
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC9328MX21DVK 功能描述:處理器 - 專門(mén)應(yīng)用 DB I.MX21 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MX21DVK 制造商:Freescale Semiconductor 功能描述:Microprocessor
MC9328MX21DVKR2 功能描述:處理器 - 專門(mén)應(yīng)用 DB I.MX21 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MX21DVM 功能描述:處理器 - 專門(mén)應(yīng)用 DB I.MX21 17X17 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MX21DVMR2 功能描述:處理器 - 專門(mén)應(yīng)用 DB I.MX21 17X17 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
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