Pinout and Signal Descriptions
Technical Data
MC68HC912D60A — Rev. 3.1
60
Pinout and Signal Descriptions
Freescale Semiconductor
3.6.12 Port Pull-Up Pull-Down and Reduced Drive
MCU ports can be configured for internal pull-up. To reduce power
consumption and RFI, the pin output drivers can be configured to
operate at a reduced drive level. Reduced drive causes a slight increase
in transition time depending on loading and should be used only for ports
which have a light loading.
Table 3-4 summarizes the port pull-up/pull-
down default status and controls.
Table 3-4. Port Pull-Up, Pull-Down and Reduced Drive Summary
Enable Bit
Reduced Drive Control Bit
Port
Name
Resistive
Input Loads
Register
(Address)
Bit Name
Reset
State
Register
(Address)
Bit Name
Reset
State
Port A
Pull-up
PUCR ($000C)
PUPA
Disabled
RDRIV ($000D)
RDPA
Full drive
Port B
Pull-up
PUCR ($000C)
PUPB
Disabled
RDRIV ($000D)
RDPB
Full drive
Port E:
PE7,
PE[3:2]
Pull-up
PUCR ($000C)
PUPE
Enabled
RDRIV ($000D)
RDPE
Full drive
PE[1:0]
Pull-up
PUCR ($000C)
PUPE
Enabled
—
PE[6:4]
None
—
RDRIV ($000D)
RDPE
Full drive
Port G
Pull-up or
Pull-
down(1)
PUCR ($000C)
PUPG
Enabled
RDRIV ($000D)
RDPG
Full drive
Port H
Pull-up or
Pull-
down(2)
PUCR ($000C)
PUPH
Enabled
RDRIV ($000D)
RDPH
Full drive
Port P
Pull-up
PWCONT ($0054) PUPP
Disabled
PWCONT ($0054)
RDPP
Full drive
PS[1:0]
Pull-up
PURDS ($00D9)
PUPS0
Disabled
PURDS ($00DB)
RDPS0
Full drive
PS[3:2]
Pull-up
PURDS ($00D9)
PUPS1
Disabled
PURDS ($00DB)
RDPS1
Full drive
PS[7:4]
Pull-up
PURDS ($00D9)
PUPS2
Disabled
PURDS ($00DB)
RDPS2
Full drive
Port T
Pull-up
TMSK2 ($008D)
PUPT
Disabled
TMSK2 ($008D)
TDRB
Full drive
PortCAN[1]:
TxCAN
None
—
PortCAN[0]:
RxCAN
Pull-up
Always enabled
—
Port
CAN[7:2]
Pull-up
PCTLCAN
($013D)
PUPCAN Disabled
PCTLCAN ($013D) RDPCAN Full drive
Port AD0
None
—
Port AD1
None
—
1. Pull-Up when PGUPD input pin is high, Pull-down when PGUPD input pin is low.
In the 80-pin version, PGUPD is internally tied to VDD, hence PG4 is pulled up.
2. Pull-Up when PHUPD input pin is high, Pull-down when PHUPD input pin is low.
In the 80-pin version, PHUPD is internally tied to VSS, hence PH4 is pulled down.