參數(shù)資料
型號(hào): MC908QL4V
廠商: Motorola, Inc.
英文描述: Microcontrollers
中文描述: 微控制器
文件頁(yè)數(shù): 145/222頁(yè)
文件大?。?/td> 2861K
代理商: MC908QL4V
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Registers
MC68HC908QL4 MC68HC908QL3 MC68HC908QL2 Data Sheet, Rev. 4
Freescale Semiconductor
145
No Interrupts Pending
This value indicates that all pending interrupt sources have been serviced. In polling mode, the
SLCSV is read and interrupts serviced until this value reads back 0. This source will not generate
an interrupt of the CPU, regardless of state of SLCIE.
No Bus Activity (LIN specified error)
The No-Bus-Activity condition occurs if no valid SYNCH BREAK FIELD or BYTE FIELD was
received for more than 2
23
SLIC clock counts since the reception of the last valid message. For
example, with 6.4 MHz SLIC clock frequency, a No-Bus-Activity interrupt will occur about 1.31
seconds after the bus begins to idle.
TX Message Buffer Empty — Checksum Transmitted
When the entire LIN message frame has been transmitted successfully, complete with the
appropriately selected checksum byte, this interrupt source is asserted. This source is used for all
standard LIN message frames and the final set of bytes with extended LIN message frames.
TX Message Buffer Empty
This interrupt source indicates that all 8 bytes in the LIN message buffer have been transmitted
with no checksum appended. This source is used for intermediate sets of 8 bytes in extended LIN
message frames.
RX Message Buffer Full — Checksum OK
When the entire LIN message frame has been received successfully, complete with the
appropriately selected checksum byte, and the checksum calculates correctly, this interrupt source
is asserted. This source is used for all standard LIN message frames and the final set of bytes with
extended LIN message frames. To clear this source, SLCD0 must be read first.
RX Data Buffer Full — No Errors
This interrupt source indicates that 8 bytes have been received with no checksum byte and are
waiting in the LIN message buffer. This source is used for intermediate sets of 8 bytes in extended
LIN message frames. To clear this source, SLCD0 must be read first.
Bit Error
A unit that is sending a bit on the bus also monitors the bus. A BIT_ERROR must be detected at
that bit time, when the bit value that is monitored is different from the bit value that is sent. The
SLIC will terminate the data transmission upon detection of a bit error, according to the LIN
specification. Bit errors are not checked when the LIN bus is running at high speed due to the
effects of physical layer round trip delay. Bit errors are fully checked at all LIN 2.0 compliant speeds
of 20 kbps and below.
$1C
0
1
1
1
Receiver Buffer Overrun
7
$20
1
0
0
0
Reserved
8
$24
1
0
0
1
Checksum Error
9
$28
1
0
1
0
Byte Framing Error
10
$2C
1
0
1
1
Identifier Received Successfully
11
$30
1
1
0
0
Identifier Parity Error
12
$34
1
1
0
1
Inconsistent-Synch-Field-Error
13
$38
1
1
1
0
Reserved
14
$3C
1
1
1
1
Wakeup
15 (Highest)
Table 14-2. Interrupt Sources Summary (BTM = 0) (Continued)
SLCSV
I3
I2
I1
I0
Interrupt Source
Priority
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