
Input/Output (I/O) Ports
MC68HC908GZ60 MC68HC908GZ48 MC68HC908GZ32 Data Sheet, Rev. 6
170
Freescale Semiconductor
$0004
Data Direction Register A
(DDRA)
Read:
DDRA7
DDRA6
DDRA5
DDRA4
DDRA3
DDRA2
DDRA1
DDRA0
Write:
Reset:
00000000
$0005
Data Direction Register B
(DDRB)
Read:
DDRB7
DDRB6
DDRB5
DDRB4
DDRB3
DDRB2
DDRB1
DDRB0
Write:
Reset:
00000000
$0006
Data Direction Register C
(DDRC)
Read:
0
DDRC6
DDRC5
DDRC4
DDRC3
DDRC2
DDRC1
DDRC0
Write:
Reset:
00000000
$0007
Data Direction Register D
(DDRD)
Read:
DDRD7
DDRD6
DDRD5
DDRD4
DDRD3
DDRD2
DDRD1
DDRD0
Write:
Reset:
00000000
$0008
Port E Data Register
(PTE)
Read:
0
PTE5
PTE4
PTE3
PTE2
PTE1
PTE0
Write:
Reset:
Unaffected by reset
$000C
Data Direction Register E
(DDRE)
Read:
0
DDRE5
DDRE4
DDRE3
DDRE2
DDRE1
DDRE0
Write:
Reset:
00000000
$000D
Port A Input Pullup Enable
Register (PTAPUE)
Read:
PTAPUE7 PTAPUE6 PTAPUE5 PTAPUE4 PTAPUE3 PTAPUE2 PTAPUE1 PTAPUE0
Write:
Reset:
00000000
$000E
Port C Input Pullup Enable
Register (PTCPUE)
Read:
0
PTCPUE6 PTCPUE5 PTCPUE4 PTCPUE3 PTCPUE2 PTCPUE1 PTCPUE0
Write:
Reset:
00000000
$000F
Port D Input Pullup Enable
Register (PTDPUE)
Read:
PTDPUE7 PTDPUE6 PTDPUE5 PTDPUE4 PTDPUE3 PTDPUE2 PTDPUE1 PTDPUE0
Write:
Reset:
00000000
$0440
Port F Data Register
(PTF)
Read:
PTF7
PTF6
PTF5
PTF4
PTAF3
PTF2
PTF1
PTF0
Write:
Reset:
Unaffected by reset
$0441
Port G Data Register
(PTG)
Read:
PTG7
PTG6
PTG5
PTG4
PTG3
PTG2
PTG1
PTG0
Write:
Reset:
Unaffected by reset
Addr.
Register Name
Bit 7
654321
Bit 0
= Unimplemented
Figure 13-1. I/O Port Register Summary (Sheet 2 of 3)