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Electrical Specifications
5.0 V DC Electrical Characteristics
MC68HC908GR8 — Rev 4.0
Technical Data
MOTOROLA
Electrical Specifications
For More Information On This Product,
Go to: www.freescale.com
365
Pullup resistors (as input only)
Ports PTA3/KBD3–PTA0/KBD0, PTC1–PTC0,
PTD6/T2CH0–PTD0/SS
R
PU
20
45
65
k
Capacitance
Ports (as input or output)
C
Out
C
In
—
—
—
—
12
8
pF
Monitor mode entry voltage
V
TST
V
DD
+2.5
—
8
V
Low-voltage inhibit, trip falling voltage – target
V
TRIPF
3.85
4.25
4.50
V
Low-voltage inhibit, trip rising voltage – target
V
TRIPR
3.95
4.35
4.60
V
Low-voltage inhibit reset/recover hysteresis – target
(V
TRIPF
+ V
HYS
= V
TRIPR
)
V
HYS
—
100
—
mV
POR rearm voltage
(8)
V
POR
0
—
100
mV
POR reset voltage
(9)
V
PORRST
0
700
800
mV
POR rise time ramp rate
(10)
R
POR
0.035
—
—
V/ms
Notes:
1. V
DD
= 5.0 Vdc
±
10%, V
SS
= 0 Vdc, T
A
= T
L
to T
H
, unless otherwise noted
2. Typical values reflect average measurements at midpoint of voltage range, 25
°
C only.
3. Run (operating) I
DD
measured using external square wave clock source (f
osc
= 32.8 MHz). All inputs 0.2 V from rail. No
dc loads. Less than 100 pF on all outputs. C
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
affects run I
DD
. Measured with all modules enabled.
4. Wait I
DD
measured using external square wave clock source (f
osc
= 32.8 MHz). All inputs 0.2 V from rail. No dc loads. Less
than 100 pF on all outputs. C
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait
I
DD
. Measured with PLL and LVI enabled.
5. Stop I
DD
is measured with OSC1 = V
SS
.
6. Stop I
DD
with TBM enabled is measured using an external square wave clock source (f
OSC
= 32.8 KHz). All inputs 0.2 V
from rail. No dc loads. Less than 100 pF on all outputs. All inputs configured as inputs.
7. Pullups and pulldowns are disabled. Port B leakage is specified in
ADC Characteristics
.
8. Maximum is highest voltage that POR is guaranteed.
9. Maximum is highest voltage that POR is possible.
10. If minimum V
DD
is not reached before the internal POR reset is released, RST must be driven low externally until minimum
V
DD
is reached.
Table 23-4. 5.0V DC Electrical Characteristics
Characteristic
(1)
Symbol
Min
Typ
(2)
Max
Unit
F
Freescale Semiconductor, Inc.
n
.