參數(shù)資料
型號(hào)： MC88916DW70
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時(shí)鐘及定時(shí)
英文描述： 88916 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PDSO20
封裝： PLASTIC, SOIC-20
文件頁(yè)數(shù)： 6/10頁(yè)
文件大小： 503K
代理商： MC88916DW70
MC88916
TIMING SOLUTIONS
BR1333 — REV 5
5
MOTOROLA
AC CHARACTERISTICS (TA = –40°C to +85°C; VCC = 5.0V ± 5%)
Symbol
Parameter
Mimimum
Maximum
Unit
Condition
tRISE/FALL1
All Outputs
Rise/Fall Time, All Outputs into a 50
Load
0.3
1.6
ns
tRISE – 0.8V to 2.0V
tFALL – 2.0V to 0.8V
tRISE/FALL1
2X_Q Output
Rise/Fall Time into a 20pF Load, With
Termination Specified in AppNote 3
0.5
1.6
ns
tRISE – 0.8V to 2.0V
tFALL – 2.0V to 0.8V
tpulse width(a)1
(Q0, Q1, Q2, Q3)
Output Pulse Width
Q0, Q1, Q2, Q3 at VCC/2
0.5tcycle – 0.5
0.5tcycle + 0.5
ns
50
Load Terminated to
VCC/2 (See App Note 3)
tpulse width(b)1
(2X_Q Output)
Output Pulse Width
40–49MHz
2X_Q at VCC/2
50–65MHz
66–80MHz
0.5tcycle – 1.55
0.5tcycle – 1.05
0.5tcycle – 0.5
0.5tcycle + 1.55
0.5tcycle + 1.05
0.5tcycle + 0.5
ns
50
Load Terminated to
VCC/2 (See App Note 3)
tPD1,4
SYNC – Q/2
SYNC Input to Q/2 Output Delay
(Measured at SYNC and Q/2 Pins)
–0.75
–0.15
ns
With 1M
From RC1
to An VCC
(See Application Note 2)
+1.25 7
+3.25 7
ns
With 1M
From RC1
to An GND
(See Application Note 2)
tSKEWr1,2
(Rising)
Output–to–Output Skew
Between Outputs Q0–Q2, Q/2
(Rising Edge Only)
—
500
ps
Into a 50
Load
Terminated to VCC/2
(See Timing Diagram in
Figure 6)
tSKEWf1,2
(Falling)
Output–to–Output Skew
Between Outputs Q0–Q2
(Falling Edge Only)
—
1.0
ns
Into a 50
Load
Terminated to VCC/2
(See Timing Diagram in
Figure 6)
tSKEWall1,2
Output–to–Output Skew
2X_Q, Q/2, Q0–Q2 Rising
Q3 Falling
—
1.0
ns
Into a 50
Load
Terminated to VCC/2
(See Timing Diagram in
Figure 6)
tLOCK3
Phase–Lock Acquisition Time,
All Outputs to SYNC Input
1
10
ms
tPHL MR – Q
Propagation Delay,
MR to Any Output (High–Low)
1.5
13.5
ns
Into a 50
Load
Terminated to VCC/2
(See Timing Diagram in
Figure 6)
tREC, MR to
SYNC6
Reset Recovery Time rising MR edge
to falling SYNC edge
9
—
ns
tW, MR LOW6
Minimum Pulse Width, MR input Low
5
—
ns
tW, RST_IN LOW
Minimum Pulse Width, RST_IN Low
10
—
ns
When in Phase–Lock
tPZL
Output Enable Time
RST_IN Low to RST_OUT Low
1.5
16.5
ns
See Application
Note 5
tPLZ
Output Enable Time
RST_IN High to RST_OUT High Z
1016 ‘Q’ Cycles
(508 Q/2 Cycles)
1024 ‘Q’ Cycles
(512 Q/2 Cycles)
ns
See Application
Note 5
1. These specifications are not tested, they are guaranteed by statistical characterization. See Application Note 1 for a discussion of this
methodology.
2. Under equally loaded conditions and at a fixed temperature and voltage.
3. With VCC fully powered–on: tCLOCK Max is with C1 = 0.1F; tLOCK Min is with C1 = 0.01F.
4. See Application Note 4 for the distribution in time of each output referenced to SYNC.
5. Limits do not meet requirements of the 68040 microprocessor. Refer to the 88920 for a low frequency 68040 clock driver.
6. Specification is valid only when the PLL_EN pin is low.
7. This is a typical specification only, worst case guarantees are not provided.
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
MC88916
Low Skew CMOS PLL Clock Drivers With Processor Reset
NETCOM
IDT Low Skew CMOS PLL Clock Drivers With Processor Reset
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MC88916
5
相關(guān)PDF資料
PDF描述
MC88921DW 88921 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
MC88LV915TFN 88LV SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PQCC28
MC88LV926DW 88LV SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PDSO20
MD2FLDL-TTL-35G ACTIVE DELAY LINE, TRUE OUTPUT, DSO6
MD2FLDL-TTL-7F ACTIVE DELAY LINE, TRUE OUTPUT, DIP6
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC88916DW80 功能描述:IC DRIVER CLK PLL 80MHZ 20-SOIC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
MC88916DWR2 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:LOW SKEW CMOS PLL CLOCK DRIVER WITH PROCESSOR RESET
MC88916EG70 功能描述:IC PLL CLOCK DRIVER 20-SOIC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
MC88916EG70R2 功能描述:IC PLL CLOCK DRIVER 20-SOIC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
MC88916EG80 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 FSL 5V CMOS PLL Clk Driver w/ Reset RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*