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參數(shù)資料
| 型號： | MC88915TFN70 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 88915 SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 6/18頁 |
| 文件大?。?/td> | 401K |
| 代理商： | MC88915TFN70 |
MC88915T
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
39
Figure 5. Graphs
8.
The lock indicator pin (LOCK) will reliably indicate a
phase-locked condition at SYNC input frequencies down
to 10 MHz. At frequencies below 10 MHz, the frequency of
correction pulses going into the phase detector form the
SYNC and FEEDBACK pins may not be sufficient to allow
the lock indicator circuitry to accurately predict a
phase-locked condition. The MC88915T is guaranteed to
provide stable phase-locked operation down to the
appropriate minimum input frequency given in Table 22,
even though the LOCK pin may be LOW at frequencies
below 10 MHz. The exact minimum frequency where the
lock indicator functionality can be guaranteed will be
available when the MC88915T reaches “MC” status.
–0.50
–0.75
–1.00
–1.25
–1.50
–0.5
–1.0
–1.5
–2.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
3.5
3.0
2.5
2.0
1.5
1.0
0.5
2.5
5.0
7.5
10.0
12.5
15.0
17.5
2.5
5.0
7.5
10.0
12.5
15.0
17.5
0
5
10
15
20
25
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0
27.5
t PD
SYNC
T
O
FEEDBACK
(ns)
t PD
SYNC
TO
FEEDBACK
(ns)
t PD
SYN
C
T
O
FEED
BACK
(ns
)
t PD
SYNC
T
O
FEEDBAC
K
(ns
)
SYNC INPUT FREQUENCY (MHz)
Figure 5a
Figure 5b
Figure 5c
Figure 5d
tPD versus Frequency Variation for Q/2 Output Fed
Back, Including Process and Voltage Variation @ 25°C
(with 1.0 M
Resistor Tied to Analog VCC)
tPD versus Frequency Variation for Q4 Output Fed
Back, Including Process and Voltage Variation @ 25°C
(with 1.0 M
Resistor Tied to Analog VCC)
tPD versus Frequency Variation for Q/2 Output Fed
Back, Including Process and Voltage Variation @ 25°C
(with 1.0 M
Resistor Tied to Analog GND)
tPD versus Frequency Variation for Q4 Output Fed
Back, Including Process and Voltage Variation @ 25°C
(with 1.0 M
Resistor Tied to Analog GND)
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| MC88915TFN70R2 | 功能描述:IC DRIVER CLK PLL 70MHZ 28-PLCC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MC88916 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:LOW SKEW CMOS PLL CLOCK DRIVER WITH PROCESSOR RESET |
| MC88916DW | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:LOW SKEW CMOS PLL CLOCK DRIVER WITH PROCESSOR RESET |
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| MC88916DW80 | 功能描述:IC DRIVER CLK PLL 80MHZ 20-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
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