參數(shù)資料
型號： MC8641VU1250GB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： MICROPROCESSOR, CBGA1023
封裝： 33 X 33 MM, ROHS COMPLIANT, CERAMIC, BGA-1023
文件頁數(shù)： 129/140頁
文件大?。?/td> 1484K
代理商： MC8641VU1250GB
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
89
Serial RapidIO
Figure 56. Receiver Input Compliance Mask
Table 62. Receiver Input Compliance Mask Parameters Exclusive of Sinusoidal Jitter
15.9
Measurement and Test Requirements
Since the LP-Serial electrical specification are guided by the XAUI electrical interface specified in Clause
47 of IEEE 802.3ae-2002, the measurement and test requirements defined here are similarly guided by
Clause 47. In addition, the CJPAT test pattern defined in Annex 48A of IEEE802.3ae-2002 is specified as
the test pattern for use in eye pattern and jitter measurements. Annex 48B of IEEE802.3ae-2002 is
recommended as a reference for additional information on jitter test methods.
Receiver Type
VDIFFmin
(mV)
VDIFFmax
(mV)
A (UI)
B (UI)
1.25 GBaud
100
800
0.275
0.400
2.5 GBaud
100
800
0.275
0.400
3.125 GBaud
100
800
0.275
0.400
1
0
VDIFF max
-VDIFF max
VDIFF min
-VDIFF min
Time (UI)
Re
ce
iv
e
rDif
fe
re
n
tia
lI
n
p
u
tV
o
lt
a
g
e
0
AB
1-B
1-A
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