參數(shù)資料
型號: MC8641HX1333KC
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: MICROPROCESSOR, CBGA1023
封裝: 33 X 33 MM, CERAMIC, BGA-1023
文件頁數(shù): 54/140頁
文件大?。?/td> 1484K
代理商: MC8641HX1333KC
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 0
20
Freescale Semiconductor
DDR and DDR2 SDRAM
Table 14 provides the DDR2 capacitance when Dn_GV
DD(typ) = 1.8 V.
Output high current (VOUT = 1.420 V)
IOH
–13.4
mA
Output low current (VOUT = 0.280 V)
IOL
13.4
mA
Notes:
1. D
n_GVDD is expected to be within 50 mV of the DRAM Dn_GVDD at all times.
2. D
n_MVREF is expected to be equal to 0.5 × Dn_GVDD, and to track Dn_GVDD DC variations as measured at the
receiver. Peak-to-peak noise on D
n_MVREF may not exceed ±2% of the DC value.
3. VTT is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
equal to D
n_MVREF. This rail should track variations in the DC level of Dn_MVREF.
4. Output leakage is measured with all outputs disabled, 0 V
VOUT Dn_GVDD.
Table 14. DDR2 SDRAM Capacitance for D
n_GVDD(typ)=1.8 V
Parameter/Condition
Symbol
Min
Max
Unit
Notes
Input/output capacitance: DQ, DQS, DQS
CIO
68
pF
1
Delta input/output capacitance: DQ, DQS, DQS
CDIO
—0.5
pF
1
Note:
1. This parameter is sampled. D
n_GVDD = 1.8 V ± 0.090 V, f = 1 MHz, TA = 25°C, VOUT = Dn_GVDD/2, VOUT
(peak-to-peak) = 0.2 V.
Table 13. DDR2 SDRAM DC Electrical Characteristics for D
n_GVDD(typ) = 1.8 V
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