參數(shù)資料
型號： MC8641HX1250HC
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 166.66 MHz, MICROPROCESSOR, CBGA1023
封裝： 33 X 33 MM, CERAMIC, BGA-1023
文件頁數(shù)： 62/130頁
文件大?。?/td> 1493K
代理商： MC8641HX1250HC
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
37
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
8.2.4
TBI AC Timing Specifications
This section describes the TBI transmit and receive AC timing specifications.
8.2.4.1
TBI Transmit AC Timing Specifications
Table 32 provides the TBI transmit AC timing specifications.
Figure 16 shows the TBI transmit AC timing diagram.
Figure 16. TBI Transmit AC Timing Diagram
Table 32. TBI Transmit AC Timing Specifications
At recommended operating conditions with L/TVDD of 3.3 V ± 5% and 2.5 V ± 5%.
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
TCG[9:0] setup time GTX_CLK going high
tTTKHDV
2.0
—
ns
TCG[9:0] hold time from GTX_CLK going high
tTTKHDX
1.0
—
ns
GTX_CLK rise time (20%–80%)
tTTXR
2
——
1.0
ns
GTX_CLK fall time (80%–20%)
tTTXF
2
——
1.0
ns
Notes:
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state )(reference)(state)
for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tTTKHDV symbolizes the TBI
transmit timing (TT) with respect to the time from tTTX (K) going high (H) until the referenced data signals (D) reach the valid
state (V) or setup time. Also, tTTKHDX symbolizes the TBI transmit timing (TT) with respect to the time from tTTX (K) going high
(H) until the referenced data signals (D) reach the invalid state (X) or hold time. Note that, in general, the clock reference
symbol representation is based on three letters representing the clock of a particular functional. For example, the subscript of
tTTX represents the TBI (T) transmit (TX) clock. For rise and fall times, the latter convention is used with the appropriate letter:
R (rise) or F (fall).
2. Guaranteed by design.
GTX_CLK
TCG[9:0]
tTTXR
tTTX
tTTXH
tTTXR
tTTXF
tTTKHDV
tTTKHDX
tTTXF
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