參數(shù)資料
型號: MC8640HX1250HE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 1250 MHz, MICROPROCESSOR, CBGA1023
封裝: 33 X 33 MM, CERAMIC, FCBGA-1023
文件頁數(shù): 46/130頁
文件大?。?/td> 1495K
代理商: MC8640HX1250HE
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
22
Freescale Semiconductor
DDR and DDR2 SDRAM
Figure 4 shows the DDR SDRAM input timing for the MDQS to MDQ skew measurement (tDISKEW).
Figure 4. DDR Input Timing Diagram for tDISKEW
6.2.2
DDR SDRAM Output AC Timing Specifications
Table 21. DDR SDRAM Output AC Timing Specifications
At recommended operating conditions (see Table 2).
Parameter
Symbol 1
Min
Max
Unit
Notes
MCK[n] cycle time, MCK[n]/MCK[n] crossing
tMCK
310
ns
2
MCK duty cycle
533 MHz
400 MHz
tMCKH/tMCK
47
53
%
8
ADDR/CMD output setup with respect to MCK
tDDKHAS
ns
3
533 MHz
1.48
7
400 MHz
1.95
ADDR/CMD output hold with respect to MCK
tDDKHAX
ns
3
533 MHz
1.48
7
400 MHz
1.95
MCS[n] output setup with respect to MCK
tDDKHCS
ns
3
533 MHz
1.48
7
400 MHz
1.95
MCS[n] output hold with respect to MCK
tDDKHCX
ns
3
533 MHz
1.48
7
400 MHz
1.95
MCK to MDQS Skew
tDDKHMH
–0.6
0.6
ns
4
MCK[n]
tMCK
MDQ[x]
MDQS[n]
tDISKEW
D1
D0
tDISKEW
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