參數(shù)資料
型號(hào)： MC8610PX1333JB
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 43/96頁(yè)
文件大?。?/td> 0K
描述： MPU E600 CORE 1333MHZ 783-PBGA
標(biāo)準(zhǔn)包裝： 36
系列： MPC86xx
處理器類型： 32-位 MPC86xx PowerPC
速度： 1.333GHz
電壓： 1.025V
安裝類型： 表面貼裝
封裝/外殼： 783-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 783-FCPBGA（29x29）
包裝： 托盤
MPC8610 Integrated Host Processor Hardware Specifications, Rev. 2
Electrical Characteristics
Freescale Semiconductor
48
2.13
Global Timer Module
This section describes the DC and AC electrical specifications for the global timer module (GTM) of the MPC8610.
2.13.1
GTM DC Electrical Characteristics
Table 39 provides the DC electrical characteristics for the MPC8610 global timer module pins, including GTMn_TINn,
GTMn_TOUTn, GTMn_TGATEn, and RTC.
2.13.2
GTM AC Timing Specifications
Table 40 provides the GTM input and output AC timing specifications.
Figure 21 provides the AC test load for the GTM.
Figure 21. GTM AC Test Load
Table 39. GTM DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
–0.3
0.8
V
Input current (VIN
1 = 0 V or V
IN = VDD)IIN
—±5
μA
High-level output voltage (OVDD = min, IOH = –100 μA)
VOH
OVDD – 0.2
—
V
Low-level output voltage (OVDD = min, IOL = 100 μA)
VOL
—0.2
V
Note:
1. The symbol VIN, in this case, represents the OVIN symbol referenced in Table 2 and Table 3.
Table 40. GTM Input and Output AC Timing Specification1
Characteristic
Symbol2
Min
Unit
Notes
GTM inputs—minimum pulse width
tGTIWID
7.5
ns
3
GTM outputs—minimum pulse width
tGTOWID
12
ns
Notes:
1. Input specifications are measured from the 50 percent level of the signal to the 50 percent level of the rising edge of CLKIN.
Timings are measured at the pin.
2. Timer inputs and outputs are asynchronous to any visible clock. Timer outputs should be synchronized before use by external
synchronous logic. Timer inputs are required to be valid for at least tGTIWID ns to ensure proper operation.
3. The minimum pulse width is a function of the MPX/platform clock. The minimum pulse width must be greater than or equal
to 4 times the MPX/platform clock period.
Output
Z0 = 50 Ω
OVDD/2
RL = 50 Ω
相關(guān)PDF資料
PDF描述
345-012-523-802 CARDEDGE 12POS DUAL .100 GREEN
345-012-523-801 CARDEDGE 12POS DUAL .100 GREEN
MC8610PX1066JB MPU E600 CORE 1066MHZ 783-PBGA
345-012-523-204 CARDEDGE 12POS DUAL .100 GREEN
345-012-523-202 CARDEDGE 12POS DUAL .100 GREEN
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