- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25623 > MC80C52XXX-36/883D (TEMIC SEMICONDUCTORS) 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CDIP40 PDF資料下載
參數(shù)資料
| 型號： | MC80C52XXX-36/883D |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CDIP40 |
| 文件頁數(shù)： | 61/109頁 |
| 文件大小： | 10824K |
| 代理商： | MC80C52XXX-36/883D |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁當(dāng)前第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁
40
ATtiny20 [DATASHEET]
8235E–AVR–03/2013
9.3.3
GIFR – General Interrupt Flag Register
Bits 7:6 – Res: Reserved Bits
These bits are reserved and will always read as zero.
Bit 5 – PCIF1: Pin Change Interrupt Flag 1
When a logic change on any PCINT[11:8] pin triggers an interrupt request, PCIF1 becomes set (one). If the I-bit in SREG
and the PCIE1 bit in GIMSK are set (one), the MCU will jump to the corresponding Interrupt Vector. The flag is cleared
when the interrupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to it.
Bit 4 – PCIF0: Pin Change Interrupt Flag 0
When a logic change on any PCINT[7:0] pin triggers an interrupt request, PCIF becomes set (one). If the I-bit in SREG
and the PCIE0 bit in GIMSK are set (one), the MCU will jump to the corresponding Interrupt Vector. The flag is cleared
when the interrupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to it.
Bits 3:1 – Res: Reserved Bits
These bits are reserved and will always read as zero.
Bit 0 – INTF0: External Interrupt Flag 0
When an edge or logic change on the INT0 pin triggers an interrupt request, INTF0 becomes set (one). If the I-bit in
SREG and the INT0 bit in GIMSK are set (one), the MCU will jump to the corresponding Interrupt Vector. The flag is
cleared when the interrupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to it. This flag
is always cleared when INT0 is configured as a level interrupt.
9.3.4
PCMSK1 – Pin Change Mask Register 1
Bits 7:4 – Res: Reserved Bits
These bits are reserved and will always read as zero.
Bits 3:0 – PCINT[11:8] : Pin Change Enable Mask 11:8
Each PCINT[11:8] bit selects whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT[11:8] is set
and the PCIE1 bit in GIMSK is set, pin change interrupt is enabled on the corresponding I/O pin. If PCINT[11:8] is
cleared, pin change interrupt on the corresponding I/O pin is disabled.
Bit
76543210
–
PCIF1
PCIF0
–
INTF0
GIFR
Read/Write
R
R/W
R
R/W
Initial Value
0
00000
Bit
7
6
5
4
3
2
1
0
–
PCINT11
PCINT10
PCINT9
PCINT8
PCMSK1
Read/Write
R
R/W
Initial Value
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MQ80C52EXXX-16/883:RD | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44 |
| MC80C52EXXX-12SB | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CDIP40 |
| MQ83C154XXX-12/883D | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQFP44 |
| MR80C52EXXX-20/883R | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44 |
| MR80C52EXXX-25SC | 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQCC44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC80D21000G | 制造商:COR 功能描述:RN |
| MC80F0104 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLERS |
| MC80F0104B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLERS |
| MC80F0104D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLERS |
| MC80F0204 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLERS |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。