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107
XMEGA C3 [DATASHEET]
8492F–AVR–07/2013
33.3.6 ADC characteristics
Table 33-66. Power supply, reference and input range.
Table 33-67. Clock and timing.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
AV
CC
Analog supply voltage
V
CC- 0.3
V
CC+ 0.3
V
VREF
Reference voltage
1
AV
CC- 0.6
Rin
Input resistance
Switched
4.5
k
C
in
Input capacitance
Switched
5
pF
RAREF
Reference input resistance
(leakage only)
>10
M
CAREF
Reference input capacitance
Static load
7
pF
Vin
Input range
0
V
REF
V
Conversion range
Differential mode, Vinp - Vinn
-VREF
VREF
Conversion range
Single ended unsigned mode, Vinp
-
V
VREF-V
V
Fixed offset voltage
200
lsb
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
Clk
ADC
ADC Clock frequency
Maximum is 1/4 of peripheral clock frequency
100
1800
kHz
Measuring internal signals
100
125
f
ClkADC
Sample rate
16
300
ksps
f
ADC
Sample rate
Current limitation (CURRLIMIT) off
16
300
CURRLIMIT = LOW
16
250
CURRLIMIT = MEDIUM
16
150
CURRLIMIT = HIGH
16
50
Sampling time
Configurable in steps of 1/2 ClkADC cycles up to
32 Clk
ADC cycles
0.28
320
s
Conversion time (latency)
(RES+2)/2+1+ GAIN
RES (Resolution) = 8 or 12, GAIN=0 to 3
5.5
10
Clk
ADC
cycles
Start-up time
ADC clock cycles
12
24
ADC settling time
After changing reference or input mode
7
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