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型號(hào)：	MC80C52XXX-30
廠商：	TEMIC SEMICONDUCTORS
元件分類：	微控制器/微處理器
英文描述：	8-BIT, MROM, 30 MHz, MICROCONTROLLER, CDIP40
文件頁(yè)數(shù)：	193/586頁(yè)
文件大?。?/td>	25028K
代理商：	MC80C52XXX-30

8272E–AVR–04/2013

ATmega164A/PA/324A/PA/644A/PA/1284/P

Figure 25-2. Reset register.

Boundary-scan Chain

The Boundary-scan Chain has the capability of driving and observing the logic levels on the dig-

ital I/O pins, as well as the boundary between digital and analog logic for analog circuitry having

off-chip connections.

Boundary-scan Specific JTAG Instructions

The Instruction Register is 4-bit wide, supporting up to 16 instructions. Listed below are the

JTAG instructions useful for Boundary-scan operation. Note that the optional HIGHZ instruction

is not implemented, but all outputs with tri-state capability can be set in high-impedant state by

using the AVR_RESET instruction, since the initial state for all port pins is tri-state.

As a definition in this datasheet, the LSB is shifted in and out first for all Shift Registers.

The OPCODE for each instruction is shown behind the instruction name in hex format. The text

describes which Data Register is selected as path between TDI and TDO for each instruction.

EXTEST; 0x0

Mandatory JTAG instruction for selecting the Boundary-scan Chain as Data Register for testing

circuitry external to the AVR package. For port-pins, Pull-up Disable, Output Control, Output

Data, and Input Data are all accessible in the scan chain. For Analog circuits having off-chip

connections, the interface between the analog and the digital logic is in the scan chain. The con-

tents of the latched outputs of the Boundary-scan chain is driven out as soon as the JTAG IR-

The active states are:

Capture-DR: Data on the external pins are sampled into the Boundary-scan Chain

Shift-DR: The Internal Scan Chain is shifted by the TCK input

Update-DR: Data from the scan chain is applied to output pins

ClockDR AVR_RESET

From Other Internal and

External Reset Sources

Internal reset

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