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參數(shù)資料
| 型號： | MC80C52TXXX-16SBD |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CDIP40 |
| 文件頁數(shù)： | 59/80頁 |
| 文件大?。?/td> | 5152K |
| 代理商： | MC80C52TXXX-16SBD |
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259
XMEGA A [MANUAL]
8077I–AVR–11/2012
23.5
Register Description – AES
23.5.1 CTRL
– Control register
Bit 7
– START: Start/Run
Setting this bit starts the encryption/decryption procedure, and this bit remains set while the encryption/decryption is
ongoing. Writing this bit to zero will stop/abort any ongoing encryption/decryption process. This bit is automatically
cleared if the SRIF or the ERROR flags in STATUS are set.
Bit 6
– AUTO: Auto Start Trigger
Setting this bit enables the auto-start mode. In auto-start mode, the START bit will trigger automatically and start the
encryption/decryption when all of the following conditions are met:
The AUTO bit is set before the state memory is loaded
All memory pointers (state read/write and key read/write) are zero
State memory is fully loaded
If all of these conditions are not met, the encryption/decryption will be started with an incorrect key.
Bit 5
– RESET: Software Reset
Setting this bit will reset the AES crypto module to its initial status on the next positive edge of the peripheral clock. All
registers, pointers, and memories in the module are set to their initial value. When written to one, the bit stays high for
one clock cycle before it is reset to zero by hardware.
Bit 4
– DECRYPT: Decryption / Direction
This bit sets the direction for the AES crypto module. Writing this bit to zero will set the module in encryption mode.
Writing one to this bit sets the module in decryption mode.
Bit 3
– Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero when this
register is written.
Bit 2
– XOR: State XOR Load Enable
Setting this bit enables a XOR data load to the state memory. When this bit is set, the data loaded to the state memory
are bitwise XORed with the data currently in the state memory. Writing this bit to zero disables XOR load mode, and new
data written to the state memory will overwrite the current data.
Bit 1:0
– Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to zero
when this register is written.
Bit
7
65
43
2
1
0
+0x00
START
AUTO
RESET
DECRYPT
–XOR
–
Read/Write
R/W
R
R/W
R
Initial Value
0
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