
63
7799D–AVR–11/10
ATmega8U2/16U2/32U2
1010
Reserved
1011
1100
1101
1110
1111
Table 10-9.
Watchdog Timer Prescale Select, DIV = 6(CLKwdt = CLK128 / 13) (Continued)
WDP3
WDP2
WDP1
WDP0
Number of WDT Oscillator
Cycles before 1st time-out
(Early warning)
Early warning Typical
Time-out at
V
CC = 5.0V
Watchdog
Reset/Interrupt Typical
Time-out at
V
CC = 5.0V
Table 10-10.
Watchdog Timer Prescale Select, DIV = 7 (CLKwdt = CLK128 / 15)
WDP3
WDP2
WDP1
WDP0
Number of WDT Oscillator
Cycles before 1st time-out
(Early warning)
Early warning Typical
Time-out at
V
CC = 5.0V
Watchdog
Reset/Interrupt Typical
Time-out at
V
CC = 5.0V
0
2K (2048) cycles
120 ms
240 ms
0
1
4K (4096) cycles
240 ms
480 ms
0
1
0
8K (8192) cycles
480 ms
960 ms
0
1
16K (16384) cycles
0.960 s
1.9 s
0
1
0
32K (32768) cycles
1.92 s
3.8 s
0
1
0
1
64K (65536) cycles
3.8 s
7.6 s
0
1
0
128K (131072) cycles
7.6 s
15.3 s
0
1
256K (262144) cycles
15.3 s
30.7 s
1
0
512K (524288) cycles
30.7 s
61.4 s
1
0
1
1024K (1048576) cycles
61.4 s
122 s
1010
Reserved
1011
1100
1101
1110
1111