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參數(shù)資料
| 型號： | MC80C32-30SHXXX:D |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 30 MHz, MICROCONTROLLER, CDIP40 |
| 文件頁數(shù)： | 6/109頁 |
| 文件大?。?/td> | 10824K |
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133
42023G–SAM–03/2014
ATSAM4L8/L4/L2
10.7.15
Reset Cause
Name:
RCAUSE
Access Type:
Read-only
Offset:
0x180
Reset Value:
Latest Reset Source
BOD33: Brown-out 3.3V Reset
This bit is set when the last reset was due to the supply voltage being lower than the BOD 3.3V (BOD33) threshold level.
POR33: Power-on Reset
This bit is set when the last reset was due to the I/O voltage being lower than the POR33 threshold.
OCDRST: OCD Reset
This bit is set when the last reset was due to the SYSRESETREQ bit in the AIRCR register of the CPU having been written to
one.
BKUP: Backup reset
This bit is set when the last reset was due to a wake up from the Backup mode.
WDT: Watchdog Reset
This bit is set when the last reset was due to a watchdog time-out.
EXT: External Reset Pin
This bit is set when the last reset was due to the RESET_N pin being pulled low.
BOD: Brown-out Reset
This bit is set when the last reset was due to the core supply voltage being lower than the brown-out threshold level.
POR: Power-on Reset
This bit is set when the last reset was due to the core supply voltage being lower than the power-on threshold level,
31
30
29
28
27
26
25
24
--------
23
22
21
20
19
18
17
16
--------
15
14
13
12
11
10
9
8
-
BOD33
-
POR33
-
OCDRST
76543210
-
BKUP
-
WDT
EXT
BOD
POR
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