參數(shù)資料
型號(hào): MC80C0224
廠商: Electronic Theatre Controls, Inc.
元件分類: 8位微控制器
英文描述: 8-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述: 8位單晶片微控制器
文件頁(yè)數(shù): 96/128頁(yè)
文件大小: 1408K
代理商: MC80C0224
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)當(dāng)前第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)
MC80F0208/16/24
Preliminary
92
MAR. 2005 Ver 0.2
Example:
During Timer1 interrupt is in progress, INT0 interrupt
serviced without any suspend.
TIMER1: PUSH
A
X
Y
IENH,#80H
IENL,#0
PUSH
PUSH
LDM
LDM
EI
:
:
;
Enable INT0 only
;
Disable other int.
;
Enable Interrupt
:
:
:
:
LDM
LDM
POP
POP
POP
RETI
IENH,#0FFH
IENL,#0FFH
Y
X
A
;
Enable all interrupts
19.5 External Interrupt
The external interrupt on INT0, INT1, INT2 and INT3 pins are
edge triggered depending on the edge selection register IEDS (ad-
dress 0EE
H
) as shown in Figure 19-8.
The edge detection of external interrupt has three transition acti-
vated mode: rising edge, falling edge, and both edge.
Figure 19-8 External Interrupt Block Diagram
INT0 ~ INT3 are multiplexed with general I/O ports (R10, R11,
R12, R50). To use as an external interrupt pin, the bit of port se-
lection register PSR0 should be set to “1” correspondingly.
Example:
To use as an INT0 and INT2
:
;
**** Set external interrupt port as pull-up state.
LDM
PU1,#0000_0101B
;
;
**** Set port as an external interrupt port
LDM
PSR0,#0000_0101B
;
;
**** Set Falling-edge Detection
LDM
IEDS,#0001_0001B
:
Response Time
The INT0 ~ INT3 edge are latched into INT0IF ~ INT3IF at every
machine cycle. The values are not actually polled by the circuitry
until the next machine cycle. If a request is active and conditions
are right for it to be acknowledged, a hardware subroutine call to
the requested service routine will be the next instruction to be ex-
ecuted. The DIV itself takes twelve cycles. Thus, a minimum of
twelve complete machine cycles elapse between activation of an
external interrupt request and the beginning of execution of the
first instruction of the service routine.
Figure 19-9 shows interrupt response timings.
INT0IF
INT0 pin
INT0 INTERRUPT
INT1IF
INT1 pin
INT1 INTERRUPT
INT2IF
INT2 pin
INT2 INTERRUPT
IEDS
[0EEH]
INT3IF
INT3 pin
INT3 INTERRUPT
Edge selection
Register
2
2
2
2
01
10
11
01
10
11
01
10
11
01
10
11
相關(guān)PDF資料
PDF描述
MC80C0224K 8-BIT SINGLE-CHIP MICROCONTROLLERS
MC80C0224Q 8-BIT SINGLE-CHIP MICROCONTROLLERS
MC80F0208K 8-BIT SINGLE-CHIP MICROCONTROLLERS
MC80F0208Q 8-BIT SINGLE-CHIP MICROCONTROLLERS
MC80F0216 8-BIT SINGLE-CHIP MICROCONTROLLERS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC80C0224K 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLERS
MC80C0224Q 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLERS
MC80C0424 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLERS
MC80C0424K 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLERS
MC80C0424L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLERS