參數(shù)資料
型號： MC80C0216K
廠商： Electronic Theatre Controls, Inc.
元件分類： 8位微控制器
英文描述： 8-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述： 8位單晶片微控制器
文件頁數(shù)： 81/128頁
文件大?。?/td> 1408K
代理商： MC80C0216K
Preliminary
MC80F0208/16/24
MAR. 2005 Ver 0.2
77
Figure 17-2 Baud Rate Generator Block Diagram
Figure 17-3 IFR : Interrupt Flag Register
MUX
RECEIVE
RxE
Tx_Clock
Rx_Clock
TxE
SEND
5-bit counter
Decoder
5-bit counter
match
match
(BRGCR)
-
TPS2
TPS1
TPS0
MDL3 MDL2
MDL1 MDL0
ACLK PIN
f
XIN
/2 ~ f
XIN
/2
7
Internal Data Bus
1/2
(Divider)
1/2
(Divider)
NOTE1 : In case of using interrupts of Watchdog Timer and Watch Timer together, it is
necessary to check IFR in interrupt service routine to find out which interrupt is
occurred, because the Watchdog timer and Watch timer is shared with interrupt
vector address. These flag bits must be cleared by software after reading this
register.
R/W
-
INITIAL VALUE: --00 0000
B
ADDRESS: 0DF
H
IFR
-
MSB
R/W
UART0 Tx interrupt occurred flag
NOTE3
UART0 Rx interrupt occurred flag
NOTE3
LSB
R/W
R/W
R/W
R/W
RX0IOF
TX0IOF
WTIOF
WDT interrupt occurred flag
NOTE1
WT interrupt occurred flag
NOTE1
UART1 Tx interrupt occurred flag
NOTE2
UART1 Rx interrupt occurred flag
NOTE2
RX1IOF TX1IOF
WDTIOF
NOTE2 : In case of using interrupts of UART1 Tx and UART1 Rx together, it is necessary
to check IFR in interrupt service routine to find out which interrupt is occurred,
because the UART1 Tx and UART1 Rx is shared with interrupt vector address.
These flag bits must be cleared by software after reading this register.
NOTE3 : In case of using interrupts of UART0 Tx and UART0 Rx together, it is necessary
to check IFR in interrupt service routine to find out which interrupt is occurred,
because the UART0 Tx and UART0 Rx is shared with interrupt vector address.
These flag bits must be cleared by software after reading this register.
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參數(shù)描述
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