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參數(shù)資料
| 型號： | MC74VHC573DTR2 |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 4/9頁 |
| 文件大小： | 0K |
| 描述： | IC LATCH OCT NONINV 3ST 20-TSSOP |
| 產(chǎn)品變化通告： | Product Obsolescence 24/Jan/2011 |
| 標準包裝： | 2,500 |
| 系列： | 74VHC |
| 邏輯類型： | D 型透明鎖存器 |
| 電路： | 8:8 |
| 輸出類型： | 三態(tài) |
| 電源電壓： | 2 V ~ 5.5 V |
| 獨立電路： | 1 |
| 延遲時間 - 傳輸： | 5ns |
| 輸出電流高，低： | 8mA，8mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
MC74VHC573
http://onsemi.com
4
DC ELECTRICAL CHARACTERISTICS
Unit
TA = 40 to 85°C
TA = 25°C
VCC
V
Test Conditions
Parameter
Symbol
Unit
Max
Min
Max
Typ
Min
VCC
V
Test Conditions
Parameter
Symbol
IOZ
Maximum
ThreeState Leakage
Current
Vin = VIL or VIH
Vout = VCC or GND
5.5
± 0.25
± 2.5
μA
ICC
Maximum Quiescent
Supply Current
Vin = VCC or GND
5.5
4.0
40.0
μA
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
Symbol
Parameter
Test Conditions
TA = 25°C
TA = 40 to 85°C
Unit
Min
Typ
Max
Min
Max
tPLH,
tPHL
Maximum Propagation Delay,
LE to Q
VCC = 3.3 ± 0.3V
CL = 15pF
CL = 50pF
7.6
10.1
11.9
15.4
1.0
14.0
17.5
ns
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
5.0
6.5
7.7
9.7
1.0
9.0
11.0
tPLH,
tPHL
Maximum Propagation Delay,
D to Q
VCC = 3.3 ± 0.3V
CL = 15pF
CL = 50pF
7.0
9.5
11.0
14.5
1.0
13.0
16.5
ns
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
4.5
6.0
6.8
8.8
1.0
1.0
8.0
10.0
tPZL,
tPZH
Output Enable Time,
OE to Q
VCC = 3.3 ± 0.3V
CL = 15pF
RL = 1kΩ
CL = 50pF
7.3
9.8
11.5
15.0
1.0
13.5
17.0
ns
VCC = 5.0 ± 0.5V
CL = 15pF
RL = 1kΩ
CL = 50pF
5.2
6.7
7.7
9.7
1.0
9.0
11.0
tPLZ,
tPHZ
Output Disable Time,
OE to Q
VCC = 3.3 ± 0.3V
CL = 50pF
RL = 1kΩ
10.7
14.5
1.0
16.5
ns
VCC = 5.0 ± 0.5V
CL = 50pF
RL = 1kΩ
6.7
9.7
1.0
11.0
tOSLH,
tOSHL
Output to Output Skew
VCC = 3.3 ± 0.3V
CL = 50pF
(Note 1)
1.5
1.5
ns
VCC = 5.5 ± 0.5V
CL = 50pF
(Note 1)
1.0
1.0
ns
Cin
Maximum Input Capacitance
4
10
10
pF
Cout
Maximum ThreeState
Output Capacitance (Output
in HighImpedance State)
6
pF
CPD
Power Dissipation Capacitance (Note 2)
Typical @ 25°C, VCC = 5.0V
pF
29
1. Parameter guaranteed by design. tOSLH = |tPLHm tPLHn|, tOSHL = |tPHLm tPHLn|.
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC/8 (per latch). CPD is used to determine the
noload dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50 pF, VCC = 5.0V)
Symbol
Parameter
TA = 25°C
Unit
Typ
Max
VOLP
Quiet Output Maximum Dynamic VOL
0.9
1.2
V
VOLV
Quiet Output Minimum Dynamic VOL
0.9
1.2
V
VIHD
Minimum High Level Dynamic Input Voltage
3.5
V
VILD
Maximum Low Level Dynamic Input Voltage
1.5
V
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