參數(shù)資料
型號: MC74LVQ74D
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: LOW-VOLTAGE CMOS DUAL D-TYPE FLIP-FLOP
中文描述: LVQ SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
封裝: PLASTIC, SOIC-14
文件頁數(shù): 1/9頁
文件大?。?/td> 144K
代理商: MC74LVQ74D
SEMICONDUCTOR TECHNICAL DATA
1
REV 1
Motorola, Inc. 1997
8/97
The MC74LVQ74 is a high performance, dual D–type flip–flop with
asynchronous clear and set inputs and complementary (O, O) outputs. It
operates from a 2.7 to 3.6V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance.
The MC74LVQ74 consists of 2 edge–triggered flip–flops with individual
D–type inputs. The flip–flop will store the state of individual D inputs, that
meet the setup and hold time requirements, on the LOW–to–HIGH Clock
(CP) transition.
Designed for 2.7 to 3.6V VCC Operation – Ideal for Low Power/Low
Noise Applications
Guaranteed Simultaneous Switching Noise Level and Dynamic
Threshold Performance
Guaranteed Skew Specifications
Guaranteed Incident Wave Switching into 75
Low Static Supply Current (10
μ
A) Substantially Reduces System Power
Requirements
Latchup Performance Exceeds 500mA
ESD Performance: Human Body Model >2000V
Pinout: 14–Lead
(Top View)
CD2
D2
CP2
13
14
12
11
10
9
8
2
1
3
4
5
6
7
VCC
SD2
O2
O2
CD1
D1
CP1
SD1
O1
O1
GND
DT SUFFIX
PLASTIC TSSOP
CASE 948G–01
14
1
SD SUFFIX
PLASTIC SSOP
CASE 940A–03
14
1
M SUFFIX
PLASTIC SOIC EIAJ
CASE 965–01
14
1
D SUFFIX
PLASTIC SOIC
CASE 751A–03
14
1
PIN NAMES
Function
Clock Pulse Inputs
Data Inputs
Direct Clear Inputs
Direct Set Inputs
Outputs
Pins
CP1, CP2
D1, D2
CD1, CD2
SD1, SD2
On, On
LOW–VOLTAGE CMOS
DUAL D–TYPE FLIP–FLOP
LVQ
相關(guān)PDF資料
PDF描述
MC74LVQ74DT LOW-VOLTAGE CMOS DUAL D-TYPE FLIP-FLOP
MC74LVQ74M LOW-VOLTAGE CMOS DUAL D-TYPE FLIP-FLOP
MC74LVQ74SD LOW-VOLTAGE CMOS DUAL D-TYPE FLIP-FLOP
MC74LVX00 LOW-VOLTAGE CMOS
MC74LVX00M LOW-VOLTAGE CMOS
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