參數(shù)資料
型號: MC74LCX240DTR2G
廠商: ON Semiconductor
文件頁數(shù): 1/7頁
文件大?。?/td> 0K
描述: IC INVERTER DUAL 4-INPUT 20TSSOP
標準包裝: 2,500
系列: 74LCX
邏輯類型: 逆變器,緩沖器
電路數(shù): 2
輸入數(shù): 4
特點: 三態(tài)
電源電壓: 2 V ~ 3.6 V
電流 - 靜態(tài)(最大值): 10µA
輸出電流高,低: 24mA,24mA
邏輯電平 - 低: 0.8V
邏輯電平 - 高: 2V
額定電壓和最大 CL 時的最大傳播延遲: 6.5ns @ 3V ~ 3.6V,50pF
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 20-TSSOP
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
包裝: 帶卷 (TR)
Semiconductor Components Industries, LLC, 2012
October, 2012 Rev. 10
1
Publication Order Number:
MC74LCX240/D
MC74LCX240
Low-Voltage CMOS
Octal Buffer
With 5 VTolerant Inputs and Outputs
(3State, Inverting)
The MC74LCX240 is a high performance, inverting octal buffer
operating from a 2.3 to 3.6 V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5 V allows MC74LCX240 inputs to be safely driven
from 5 V devices. The MC74LCX240 is suitable for memory address
driving and all TTL level bus oriented transceiver applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OE) input, when HIGH, disables the outputs by placing them in
a HIGH Z condition.
Features
Designed for 2.3 to 3.6 V VCC Operation
5 V Tolerant Interface Capability With 5 V TTL Logic
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (10 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds 500 mA
ESD Performance:
Human Body Model >2000 V
Machine Model >200 V
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
1
20
MARKING
DIAGRAMS
SOIC20 WB
DW SUFFIX
CASE 751D
LCX240
AWLYYWWG
LCX
240
ALYWG
G
TSSOP20
DT SUFFIX
CASE 948E
1
20
1
20
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G
= PbFree Package
(Note: Microdot may be in either location)
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