參數(shù)資料
型號: MC74LCX16374DTG
廠商: ON Semiconductor
文件頁數(shù): 1/7頁
文件大?。?/td> 0K
描述: IC FLIP FLOP 16BIT D LV 48-TSSOP
標(biāo)準(zhǔn)包裝: 39
系列: 74LCX
功能: 標(biāo)準(zhǔn)
類型: D 型總線
輸出類型: 三態(tài)非反相
元件數(shù): 2
每個元件的位元數(shù): 8
頻率 - 時鐘: 170MHz
延遲時間 - 傳輸: 1.5ns
觸發(fā)器類型: 正邊沿
輸出電流高,低: 24mA,24mA
電源電壓: 2 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 1123 (CN2011-ZH PDF)
其它名稱: MC74LCX16374DTG-ND
MC74LCX16374DTGOS
Semiconductor Components Industries, LLC, 2012
October, 2012 Rev. 10
1
Publication Order Number:
MC74LCX16374/D
MC74LCX16374
Low-Voltage CMOS 16-Bit
D-Type Flip-Flop
With 5 VTolerant Inputs and Outputs
(3State, NonInverting)
The MC74LCX16374 is a high performance, noninverting 16bit
Dtype flipflop operating from a 2.3 V to 3.6 V supply. The device is
byte controlled. Each byte has separate Output Enable and Clock Pulse
inputs. These control pins can be tied together for full 16bit operation.
High impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A VI specification of 5.5 V allows
MC74LCX16374 inputs to be safely driven from 5.0 V devices.
The MC74LCX16374 consists of 16 edgetriggered flipflops with
individual Dtype inputs and 5.0 Vtolerant 3state true outputs. The
buffered clocks (CPn) and buffered Output Enables (OEn) are common
to all flipflops within the respective byte. The flipflops will store the
state of individual D inputs that meet the setup and hold time
requirements on the LOWtoHIGH Clock (CP) transition. With the
OE LOW, the contents of the flipflops are available at the outputs.
When the OE is HIGH, the outputs go to the high impedance state. The
OE input level does not affect the operation of the flipflops.
Features
Designed for 2.3 to 3.6 V VCC Operation
6.2 ns Maximum tpd
5.0 V Tolerant Interface Capability With 5.0 V TTL Logic
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (20 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds 500 mA
ESD Performance:
Human Body Model >2000 V
Machine Model >200 V
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
MARKING DIAGRAM
TSSOP48
DT SUFFIX
CASE 1201
1
48
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= PbFree Package
1
48
LCX16374G
AWLYYWW
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
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