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參數(shù)資料
型號(hào): MC74HCT573AN
廠商: ON Semiconductor
文件頁(yè)數(shù): 3/8頁(yè)
文件大小: 0K
描述: IC LATCH OCTAL 3ST LSTTL 20DIP
產(chǎn)品變化通告: LTB Notification 03/Jan/2008
標(biāo)準(zhǔn)包裝: 18
系列: 74HCT
邏輯類型: D 型透明鎖存器
電路: 8:8
輸出類型: 三態(tài)
電源電壓: 4.5 V ~ 5.5 V
獨(dú)立電路: 1
延遲時(shí)間 - 傳輸: 30ns
輸出電流高,低: 6mA,6mA
工作溫度: -55°C ~ 125°C
安裝類型: 通孔
封裝/外殼: 20-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 20-PDIP
包裝: 管件
其它名稱: MC74HCT573ANOS
MC74HCT573A
http://onsemi.com
3
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
Vin
DC Input Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
Vout
DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
Iin
DC Input Current, per Pin
± 20
mA
Iout
DC Output Current, per Pin
± 25
mA
ICC
DC Supply Current, VCC and GND Pins
± 50
mA
PD
Power Dissipation in Still Air
Plastic DIP
SOIC Package
TSSOP Package
750
500
450
mW
Tstg
Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP, TSSOP or SOIC Package)
260
_C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: 6.1 mW/°C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage (Referenced to GND)
4.5
5.5
V
Vin, Vout
DC Input Voltage, Output Voltage (Referenced to GND)
0
VCC
V
TA
Operating Temperature, All Package Types
– 55
+ 125
_C
tr, tf
Input Rise and Fall Time (Figure 1)
0
500
ns
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
Test Conditions
VCC
V
Guaranteed Limit
Unit
– 55 to
25_C
v 85_C
v 125_C
VIH
Minimum HighLevel Input
Voltage
Vout = 0.1 V or VCC – 0.1 V
|Iout| v 20 μA
4.5
5.5
2.0
2.0
2.0
2.0
2.0
2.0
V
VIL
Maximum LowLevel Input
Voltage
Vout = 0.1 V or VCC – 0.1 V
|Iout| v 20 μA
4.5
5.5
0.8
0.8
0.8
V
VOH
Minimum HighLevel Output
Voltage
Vin = VIH or VIL
|Iout| v 20 μA
4.5
5.5
4.4
5.4
4.4
5.4
4.4
5.4
V
Vin = VIH or VIL
|Iout| v 6.0 mA
4.5
3.98
3.84
3.7
VOL
Maximum LowLevel Output
Voltage
Vin = VIH or VIL
|Iout| v 20 μA
4.5
5.5
0.1
0.1
0.1
V
Vin = VIH or VIL
|Iout| v 6.0 mA
4.5
0.26
0.33
0.4
Iin
Maximum Input Leakage Current
Vin = VCC or GND
5.5
± 0.1
± 1.0
± 1.0
μA
IOZ
Maximum ThreeState
Leakage Current
Output in HighImpedance State
Vin = VIL or VIH
Vout = VCC or GND
5.5
± 0.5
± 5.0
± 10
μA
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout v 0 μA
5.5
4.0
40
160
μA
ΔICC
Additional Quiescent Supply
Current
Vin = 2.4 V, Any One Input
Vin = VCC or GND, Other Inputs
lout = 0 μA
5.5
≥ – 55_C
25_C to 125_C
mA
2.9
2.4
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
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